Integrated circuit I/O pad cell modeling

Abstract

A design system for modeling bi-directional pad cells, the interaction of internal pull cells/resistors with pad cells of all types, and the interaction of external pull cells/resistors with pad cells of all types. This modeling technique involves the use of three separate pins on each bi-directional pad cell: an input-only pin, an output-only pin, and a resolved pin. The input-only pin reflects the data that is supplied to the pad from external sources. The output-only pin reflects the data that is supplied as output from the pad cell (strong data from the output driver). The resolved pin reflects the combination of the input and the output data that are present, as well as the effect of resistive data supplied by pull-up/down resistors/cells. The output-only and resolved pins are implemented as internal or hidden pins within a pad cell model. These pins are included in the model for the I/O pad cells in a given library. The existing pad pin serves as the input-only pin. The model provides two modes of operation such that the same model can be used for either chip-level or system-level simulations.

We claim:  
     
         1 . A system for modeling a bi-directional signal of an electric circuit, comprising: 
 means for maintaining a state of an input component of the bi-directional signal;    means for maintaining a state of an output component of the bi-directional signal; and    means for generating a resolved state based upon at least the input component state and output component state.    
     
     
         2 . The system of  claim 1  wherein the resolved state is further based upon resistive data.  
     
     
         3 . The system of  claim 1  wherein the input component state, output component state and resolved state are output to a computer file.  
     
     
         4 . An improved pad cell model, comprising: 
 an input node which reflects data that is supplied to the pad cell from external sources;    an output node which reflects data that is supplied as output from the pad cell; and    a resolved node which reflects the combination of the input node and output node.    
     
     
         5 . The pad cell model of  claim 4  wherein the resolved node also reflects the combination of resistive data.  
     
     
         6 . The pad cell model of  claim 4  further comprising means for selectively connecting the input node to the resolved node.  
     
     
         7 . An improved pad cell model, comprising: 
 an I/O pad;    an output driver;    a buffer coupled between the I/O pad and the output driver; and    an input receiver having an input and output, said input receiver comprising means for coupling the input (i) directly to the output, or (ii) to the output through a buffer.    
     
     
         8 . A method for modeling a bi-directional signal of an electric circuit, comprising the steps of: 
 maintaining a state of an input component of the bi-directional signal;    maintaining a state of an output component of the bi-directional signal; and    generating a resolved state based upon at least the input component state and output component state.    
     
     
         9 . The method of  claim 8  wherein the resolved state is further based upon resistive data.  
     
     
         10 . The method of  claim 8  further comprising the steps of: 
 specifying at least one bi-directional signal of a logic design to be simulated; and  
 simulating the logic design.  
 
     
     
         11 . The method of  claim 8  further comprising the step of selecting whether to couple the input (i) directly to the output, or (ii) to the output through a buffer.  
     
     
         12 . A method for operating the pad cell model of  claim 4  in accordance with the method of claim  8 .