Method of making single c-axis PGO thin film on ZrO2 for non-volatile memory applications

Abstract

A thin film structure includes a substantially single-phase, c-axis PGO film on an insulator for use in metal ferroelectric insulator semiconductor single transistor nonvolatile memory applications. The PGO on insulator structure can also be used in capacitors, pyroelectric infrared sensors, optical displays, optical switches, piezoelectric transducers, and surface acoustic wave devices. In a preferred embodiment, the PGO film is deposited on a Zirconium Oxide insulator layer.

We claim:  
     
         1 . A metal ferroelectric insulator semiconductor field effect transistor comprising: 
 a semiconductor;    a layer of insulator material positioned on said semiconductor; and    a layer of PGO positioned on said layer of insulator material.    
     
     
         2 . The transistor of  claim 1  wherein said insulator material is chosen from the group consisting of: Zirconium Oxide (ZrO 2 ), Hafnium Oxide (HfO 2 ), silicates of Zirconium, silicates of Hafnium, Aluminum Oxide, Yttrium Oxide, Calcium Oxide, Lanthanum Oxide, Titanium Oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), doped ZrO 2 , doped HfO 2 , Zr—Al—O, Hf—Al—O, Zr—Ti—O, Hf—Ti—O, La—Al—O, and combinations thereof.  
     
     
         3 . The transistor of  claim 1  further comprising a top electrode layer positioned on said layer of PGO, wherein said top electrode layer is manufactured of a material chosen from the group consisting of: Platinum (Pt); Iridium (Ir); Tantalum (Ta); Ruthenium (Ru); a conductive oxide; and a conductive alloy.  
     
     
         4 . The transistor of  claim 1  wherein said layer of PGO comprises a single phase having a c-axis orientation throughout at least 70% of said layer of PGO.  
     
     
         5 . The transistor of  claim 3  wherein said transistor has a memory window in a range of 0.1 to 3.0 volts.  
     
     
         6 . The transistor of  claim 3  wherein said semiconductor includes a source region and a drain region.  
     
     
         7 . The transistor of  claim 1  wherein said layer of PGO has an at least 80% single-phase, c-axis orientation.  
     
     
         8 . A thin film semiconductor structure comprising: 
 a substrate;    a layer of Zirconium Oxide positioned on said substrate; and    a ferroelectric layer of substantially single phase, c-axis oriented PGO positioned on said Zirconium Oxide layer.    
     
     
         9 . The structure of  claim 8  wherein said semiconductor structure is chosen from the group consisting of: a transistor; a capacitor; a pyroelectric infrared sensor; an optical display; an optical switch; a piezoelectric transducer; and a surface acoustic wave device.  
     
     
         10 . The structure of  claim 8  wherein said substrate comprises Silicon.  
     
     
         11 . The structure of  claim 8  wherein said semiconductor structure is a non-volatile memory device.  
     
     
         12 . The structure of  claim 8  further comprising an electrode positioned on said ferroelectric layer.  
     
     
         13 . The structure of  claim 8  wherein said ferroelectric layer has a thickness of at least 100 Angstroms.  
     
     
         14 . The structure of  claim 12  wherein said layer of Zirconium Oxide and said ferroelectric layer define a leakage current, and wherein said leakage current is less than 1×10 −6  A/cm 2  at 100 KV/cm.  
     
     
         15 . A method of making a substantially single phase, c-axis PGO thin film on an insulator for use in a non-volatile memory device, comprising the steps of: 
 providing a semiconductor substrate;    depositing an insulator film on said semiconductor substrate; and    depositing a PGO film on said insulator film, wherein said PGO film comprises a substantially single phase, c-axis oriented film.    
     
     
         16 . The method of  claim 15  further comprising depositing a metal gate electrode on said PGO film.  
     
     
         17 . The method of  claim 15  wherein said semiconductor substrate comprises silicon and said insulator film is chosen from the group consisting of: Zirconium Oxide (ZrO 2 ), Hafnium Oxide (HfO 2 ), silicates of Zirconium, silicates of Hafnium, Aluminum Oxide, Yttrium Oxide, Calcium Oxide, Lanthanum Oxide, Titanium Oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), doped ZrO 2 , doped HfO 2 , Zr—Al—O, Hf—Al—O, Zr—Ti—O, Hf—Ti—O, La—Al—O, and combinations thereof.  
     
     
         18 . The method of  claim 15  wherein said step of depositing said insulator film comprises a deposition method chosen from the group consisting of: physical vapor deposition (PVD); evaporation and oxidation; chemical vapor deposition (CVD); and atomic layer deposition.  
     
     
         19 . The method of  claim 15  wherein said step of depositing said PGO film comprises a deposition method chosen from the group consisting of: spin-on; physical vapor deposition; CVD; metal organic CVD (MOCVD); chemical solution deposition (CSD); and laser ablation.  
     
     
         20 . The method of  claim 16  wherein said metal gate electrode comprises a material chosen from the group consisting of: Platinum (Pt); Iridium (Ir); Tantalum (Ta); Ruthenium (Ru); a conductive oxide; and a conductive alloy.