Silicon wafer and method for producing the same

Abstract

An n-type wafer is provided having a <111> crystal axis in which the resistivity distribution in the surface of the wafer is uniform. The wafer is suitable for use in, e.g., a zener diode. A method is provided for growing a single crystal of n-type silicon doped with a group V element such as phosphorus using the Czochralski method or the floating zone melting (FZ) method wherein the center axis of the silicon single crystal is tilted by a tilt angle of 1-6 degrees from the <111> crystal axis. The silicon single crystal is sliced obliquely at the angle corresponding to the tilt angle to yield an n-type wafer having a <111> crystal axis.

What is claimed as new and desired to be secured by letters patent in the United States is:  
     
         1 . A silicon wafer, comprising: 
 an n-type silicon wafer having a <111> crystal axis, doped with a group V element;    wherein a resistivity distribution in the surface of the wafer, represented by Δρ={(ρ max−ρ min)/ρ min}×100, is 10% or less.    
     
     
         2 . The silicon wafer of  claim 1 , wherein the resistivity distribution, Δρ is 5% or less.  
     
     
         3 . The silicon wafer of  claim 1 , wherein the resistivity distribution, Δρ is 2% or less.  
     
     
         4 . The silicon wafer of  claim 1 , wherein the silicon wafer has a diameter of 4 inches or more.  
     
     
         5 . The silicon wafer of  claim 1 , wherein the silicon wafer has a diameter of 5 inches or more.  
     
     
         6 . The silicon wafer of  claim 1 , wherein the surface of the silicon wafer comprises a plane perpendicular to the <111> crystal axis.  
     
     
         7 . The silicon of  claim 1 , wherein said group V element is selected from the group consisting of phosphorous, arsenic, antimony, and nitrogen.  
     
     
         8 . The silicon wafer of  claim 1 , wherein said group V element is phosphorous.  
     
     
         9 . The silicon wafer of  claim 1 , wherein said group V element is antimony.  
     
     
         10 . The silicon wafer of  claim 1 , wherein said group V element is arsenic.  
     
     
         11 . A method for producing a silicon wafer, comprising: 
 growing a single crystal of n-type silicon doped with a group V element with a method selected from the group consisting of the Czochralski method and the floating zone melting (FZ) method to obtain a grown single crystal, wherein a center axis of the grown single crystal is tilted by a tilt angle of 1-6 degrees from the <111> crystal axis; and    slicing the grown single crystal obliquely at an angle corresponding to the tilt angle to obtain a sliced wafer having a <111> crystal axis.    
     
     
         12 . The method of  claim 11 , wherein the tilt angle is between 2 and 5 degrees.  
     
     
         13 . The method of  claim 11 , wherein the tilt angle is between 3 and 4 degrees.  
     
     
         14 . The method of  claim 11 , further comprising growing the single crystal at a crucible rotation rate of more than 2 rpm.  
     
     
         15 . The method of  claim 11 , further comprising growing the single crystal at a crucible rotation rate of more than 10 rpm.  
     
     
         16 . A silicon wafer, prepared by the process of  claim 11 .  
     
     
         17 . A silicon wafer, prepared by the process of  claim 11 , having a resistivity distribution in the surface of the wafer, represented by Δρ={(ρ max−ρ min)/ρ min}×100, of 10% or less.