Semiconductor device and method of manufacturing the same
Abstract
In a combined isolation oxide film (BT 1 ), a part closer to a gate electrode (GT 13 ) reaches a buried oxide film ( 2 ) through an SOI layer ( 3 ) while a part closer to another gate electrode (GT 12 ) has a sectional shape provided with a well region on its lower portion. The shape of an edge portion of the combined isolation oxide film (BT 1 ) is in the form of a bird's beak in a LOCOS isolation oxide film. Consequently, the thicknesses of portions defining edge portions of the gate oxide films (GO 12, GO 13 ) are locally increased. Thus provided are a semiconductor device including a MOS transistor having a gate oxide film prevented from dielectric breakdown without increasing its thickness and a method of manufacturing the same.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
a semiconductor substrate; a plurality of semiconductor elements formed on said semiconductor substrate; and a trench isolation oxide film obtained by burying an oxide film in a trench formed in the surface of said semiconductor substrate, for electrically isolating said plurality of semiconductor elements by said trench isolation oxide film, wherein
said trench isolation oxide film has different contour shapes of said upper edge portion on the left and right edges in a brachydirectional section of said trench isolation oxide film.
2 . The semiconductor device according to claim 1 , wherein
said semiconductor substrate is an SOI substrate comprising a silicon substrate, a buried oxide film arranged on said silicon substrate and an SOI layer arranged on said buried oxide film, and said trench isolation oxide film is arranged in the surface of said SOI substrate.
3 . The semiconductor device according to claim 1 , wherein
said trench isolation oxide film has such a contour shape that its upper edge portion projects into the surface of said semiconductor substrate in the form of a bird's beak.
4 . The semiconductor device according to claim 2 , wherein
said trench isolation oxide film has different shapes on the left and right sides in its brachydirectional section, and combinationally includes:
a full trench structure reaching said buried oxide film through said SOI layer, and
a partial trench structure having said SOI layer on its lower portion.
5 . The semiconductor device according to claim 3 , wherein
the height of a protrusion on a base portion of said upper edge portion projecting in the form of said bird's beak on the side of said full trench structure is relatively small, and the height of a protrusion on a base portion of said upper edge portion projecting in the form of said bird's beak on the side of said partial trench structure is relatively large in said trench isolation oxide film.
6 . The semiconductor device according to claim 3 , wherein
the length of said upper edge portion projecting in the form of said bird's beak on the side of said full trench structure is relatively large, and the length of said upper edge portion projecting in the form of said bird's beak on the side of said partial trench structure is relatively small in said trench isolation oxide film.
7 . The semiconductor device according to claim 6 , wherein
said trench isolation oxide film has different contour shapes of a base portion of said upper edge portion projecting in the form of said bird's beak on the side of said partial trench structure between a first inclined portion along a direction separating from said SOI layer and a second inclined portion directed toward said SOI layer, said first inclined portion has a substantially linear contour shape, and said second inclined portion has a contour shape roundedly projecting toward said SOI layer.
8 . The semiconductor device according to claim 6 , wherein
said trench isolation oxide film has different contour shapes of a base portion of said upper edge portion projecting in the form of said bird's beak on the side of said partial trench structure between a first inclined portion along a direction separating from said SOI layer and a second inclined portion directed toward said SOI layer, said first inclined portion has a contour shape roundedly depressed toward said SOI layer, and said second inclined portion has a contour shape roundedly projecting toward said SOI layer.
9 . The semiconductor device according to claim 2 , wherein
said trench isolation oxide film has such a contour shape that its lower edge portion projects between said SOI layer and said buried oxide film.
10 . A method of manufacturing a semiconductor device comprising steps of:
(a) preparing an SOI substrate comprising a silicon substrate, a buried oxide film arranged on said silicon substrate and an SOI layer arranged on said buried oxide film; (b) forming an oxide extension layer on said SOI layer; (c) forming a mask layer having a prescribed opening pattern on said oxide extension layer; (d) forming a trench by selectively removing said SOI layer through said mask layer without passing through said SOI layer from the surface; (e) forming a resist mask having an opening at a first region between a prescribed position at least on the bottom surface of said trench and a first side wall surface in a brachydirectional section, and covering a second region between at least said prescribed position and a second side wall surface in said brachydirectional section; (f) removing said trench to reach said buried oxide film through said resist mask for forming a combined trench having a portion corresponding to said second region being a partial trench having said SOI layer on its lower portion and a portion corresponding to said first region being a full trench passing through said SOI layer; (g) forming a first oxide film on the inner wall of said combined trench by thermally oxidizing the inner wall of said combined trench and said oxide extension layer; and (h) forming a trench isolation oxide film combinationally having a full trench structure reaching said buried oxide film through said SOI layer and a partial trench structure having said SOI layer on its lower portion by filling up said combined trench with a second oxide film.
11 . The method of manufacturing a semiconductor device according to claim 10 , wherein
said oxide extension layer includes:
an oxide film arranged on said SOI layer, and
a polycrystalline silicon layer arranged on said oxide film.
12 . The method of manufacturing a semiconductor device according to claim 10 , wherein
said step (h) includes steps of:
(h- 1 ) forming said second oxide film to fill up said combined trench and cover the overall area on said mask layer, and
(h- 2 ) planarizing said second oxide film by chemical mechanical polishing through said mask layer serving as a stopper.
13 . The method of manufacturing a semiconductor device according to claim 12 , wherein
said opening of said resist mask is provided over said first region and a first edge portion of said mask layer adjacent to said first region, and said first edge portion of said mask layer is removed to have a step in association with formation of said combined trench so that the thickness of said mask layer is partially reduced.
14 . The method of manufacturing a semiconductor device according to claim 12 , wherein
said resist mask further includes a local opening arranged on at least either a first prescribed region of a first edge portion of said mask layer adjacent to said first region or a second prescribed region of a second edge portion of said mask layer adjacent to said second region, and a concave portion is formed in at least either said first prescribed region or said second prescribed region of said mask layer in association with formation of said combined trench.
15 . The method of manufacturing a semiconductor device according to claim 10 , further comprising a step of performing annealing in a nitrogen atmosphere, a hydrogen atmosphere or an argon atmosphere in a stage at least either before or after formation of said first oxide film.
16 . A method of manufacturing a semiconductor device comprising steps of:
(a) preparing an SOI substrate comprising a silicon substrate, a buried oxide film arranged on said silicon substrate and an SOI layer arranged on said buried oxide film; (b) forming an oxide extension layer on said SOI layer; (c) forming a mask layer having a prescribed opening pattern on said oxide extension layer; (d) forming a trench by selectively removing said SOI layer through said mask layer without passing through said SOI layer from the surface; (e) forming a first oxide film on the inner wall of said trench by thermally oxidizing the inner wall of said trench and said oxide extension layer; (f) forming a resist mask having an opening at a first region between a prescribed position at least on the bottom surface of said trench and a first side wall surface in a brachydirectional section, and covering a second region between at least said prescribed position and a second side wall surface in said brachydirectional section; (g) removing said trench to reach said buried oxide film through said resist mask for forming a combined trench having a portion corresponding to said second region being a partial trench having said SOI layer on its lower portion and a portion corresponding to said first region being a full trench passing through said SOI layer; and (h) forming a trench isolation oxide film combinationally having a full trench structure reaching said buried oxide film through said SOI layer and a partial trench structure having said SOI layer on its lower portion by filling up said combined trench with a second oxide film.
17 . The method of manufacturing a semiconductor device according to claim 16 , wherein
said oxide extension layer includes:
an oxide film arranged on said SOI layer, and
a polycrystalline silicon layer arranged on said oxide film.
18 . The method of manufacturing a semiconductor device according to claim 16 , wherein
said step (h) includes steps of:
(h- 1 ) forming said second oxide film to fill up said combined trench and cover the overall area on said mask layer, and
(h- 2 ) planarizing said second oxide film by chemical mechanical polishing through said mask layer serving as a stopper.
19 . The method of manufacturing a semiconductor device according to claim 18 , wherein
said opening of said resist mask is provided over said first region and a first edge portion of said mask layer adjacent to said first region, and said first edge portion of said mask layer is removed to have a step in association with formation of said combined trench so that the thickness of said mask layer is partially reduced.
20 . The method of manufacturing a semiconductor device according to claim 18 , wherein
said resist mask further includes a local opening arranged on at least either a first prescribed region of a first edge portion of said mask layer adjacent to said first region or a second prescribed region of a second edge portion of said mask layer adjacent to said second region, and a concave portion is formed in at least either said first prescribed region or said second prescribed region of said mask layer in association with formation of said combined trench.Join the waitlist — get patent alerts
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