System and method for improving the accuracy of reciprocal operations performed by a floating-point unit

Abstract

The invention provides a system and method for improving the accuracy of approximating the reciprocal of a number and the reciprocal square root of a number. A method according to the present invention for approximating the reciprocal square root of a number (N) includes the steps of: (a) estimating the reciprocal square root of the number to produce an estimate (X i ); (b) multiplying X i by N to produce a first intermediate result (IR1); (c) determining a second intermediate result (IR2) according to the equation: IR2=(1−X i ,*IR1)/2; (d) multiplying IR2 by X i to produce a third intermediate result (IR3); and (e) adding IR3 to X i to produce an approximation of the reciprocal square root of the number. This method provides one advantage because of the order in which the multiplication is performed makes it likely that all results will be in normalized form. Specifically, the Newton-Raphson algorithm requires one to determine the product of: N*X i *X i . The method according to the present invention first multiplies N by X i to produce an intermediate result. This intermediate result will likely be in normalized form, even when N is large. The method then multiplies the intermediate result by X i to produce: (N*X i )*X i . If the method first multiplied X i by X i to produce the intermediate result, the intermediate result would most likely be in denormalized form when N is large. It is disadvantageous to produce a denormal result because producing a denormal result causes a loss of accuracy. Therefore, although (N*X i )*X i is mathematically identical to (X i *X i )*N, the former is preferred because it avoids denormal intermediate results. This method provides another advantage because the result of step (c) is typically a very small number. This provides an advantage because when the result of step (c) is expressed in normalized floating-point form, the precision of the result is increased, thereby improving the approximation of the reciprocal.

What is claimed is:  
     
         1 . A method for approximating the reciprocal of a number (N), comprising: 
 (a) retrieving the number from a floating-point memory, wherein the number is stored in said memory in a memory format;    (b) unpacking the number from said memory format to an internal format;    (c) estimating the reciprocal of the number to produce an estimate (X i );    (d) determining a first intermediate result (IR1) according to the equation: IR1=1−N*X i ;    (e) multiplying said first intermediate result by said estimate to produce a second intermediate result;    (f) adding said estimate to said second intermediate result to produce an approximation of the reciprocal of the number, wherein said approximation is in said internal format;    (g) packing said approximation from said internal format to said memory format; and    (h) writing said approximation in said memory format to said floating-point memory.    
     
     
         2 . The method of  claim 1 , further comprising the steps of: 
 (i) setting said estimate equal to said approximation; and    (j) repeating steps (d)-(f) to produce a more accurate approximation.    
     
     
         3 . The method of  claim 1 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         4 . A computer system having a processor in communication with means for storing instructions that enable the processor to perform arithmetic operations, the instructions comprising an instruction that enables the processor to produce an estimate (X i ) of a reciprocal of a number (N), produce an intermediate result (IR) according to the equation: IR=1−N*X i , and 
 produce an approximation (X i+1 ) of the reciprocal of said number according to the equation: X i+1 =X i +X i *IR.  
 
     
     
         5 . The computer system of  claim 4 , wherein said instruction enables the processor to first retrieve said number from a floating-point memory, wherein said number is stored in said memory in a memory format, and then enables the processor to unpack said number from said memory format to an internal format prior to enabling the processor to produce said estimate.  
     
     
         6 . The computer system of  claim 5 , wherein said approximation is in said internal format, and wherein said instruction further enables the processor to pack said approximation from said internal format to said memory format, and to write said approximation in said memory format to said memory.  
     
     
         7 . The computer system of  claim 5 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         8 . A computer program product comprising a computer useable medium having a floating-point instruction stored therein, the floating-point instruction for enabling a floating-point unit to approximate the reciprocal of a number (N), wherein the floating-point instruction enables the floating-point unit to 
 produce an estimate (X i ) of the reciprocal of the number, produce an intermediate result (IR) according to the equation: IR=1−N*X i , and    produce an approximation (X i+1 ) of the reciprocal of the number according to the equation: X i+1 =X i +X i *IR.    
     
     
         9 . The computer program product of  claim 8 , wherein said floating-point instruction enables the floating-point unit to first retrieve said number from a floating-point memory, wherein said number is stored in said memory in a memory format, and then enables the floating-point unit to unpack said number from said memory format to an internal format prior to enabling the floating-point unit to produce said estimate.  
     
     
         10 . The computer program product of  claim 9 , wherein said approximation is in said internal format, and wherein said floating-point instruction further enables the floating-point unit to pack said approximation from said internal format to said memory format, and to write said approximation in said memory format to said floating-point memory.  
     
     
         11 . The computer program product of  claim 9 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         12 . A computer system, comprising: 
 a floating-point unit having a floating-point register file that stores a floating-point number (N) in a memory format, a floating-point pipe file coupled to said floating-point register file, wherein said floating-point pipe file selects said floating-point number from said floating-point register file and unpacks said floating-point number into an internal format, and a floating-point arithmetic unit, coupled to said pipe file, that receives said unpacked floating-point number from said pipe file and performs an arithmetic operation using said number to produce a result in said internal format;    a memory for storing a sequence of instructions that enable said floating-point unit to approximate the reciprocal of said number, said sequence of instructions comprising: 
 a first instruction to enable said floating-point unit to produce an estimate (X i ) of the reciprocal of said number;  
 a second instruction to enable said floating-point unit to produce an intermediate result (IR) according to the equation: IR=1−N*X i ; and  
 a third instruction to enable said floating-point unit to produce an approximation (X i+1 ) of the reciprocal of said number according to the equation: 
 X i+1 X i +X i *IR; and  
 an instruction dispatch unit for dispatching said sequence of instructions from said memory to said floating-point unit.  
 
   
     
     
         13 . The computer system of  claim 12 , wherein said approximation is sent to said pipe file, said pipe file packs said approximation into said memory format, and said pipe file writes said approximation in said memory format to said floating-point register file.  
     
     
         14 . The computer system of  claim 12 , wherein said arithmetic unit comprises a floating-point mantissa multiplier coupled to said pipe file.  
     
     
         15 . The computer system of  claim 12 , wherein said arithmetic unit comprises a floating-point mantissa adder coupled to said mantissa multiplier.  
     
     
         16 . The computer system of  claim 12 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         17 . A method for approximating the reciprocal square root of a number, comprising: 
 (a) estimating the reciprocal square root of the number to produce an estimate (X i );    (b) multiplying said estimate by the number to produce a first intermediate result (IR1);    (c) determining a second intermediate result (IR2) according to the equation: IR2=(1−X i *IR1)/2;    (d) multiplying said second intermediate result by said estimate to produce a third intermediate result; and    (e) adding said third intermediate result to said estimate to produce an approximation of the reciprocal square root of the number.    
     
     
         18 . The method of  claim 17 , further comprising the steps of: 
 retrieving the number from a floating-point memory, wherein the number is stored in said memory in a memory format; and    unpacking the number from said memory format to an internal format prior to estimating the reciprocal square root of the number to produce said estimate (X i ).    
     
     
         19 . The method of  claim 18 , further comprising the steps of: 
 packing said approximation from said internal format to said memory format; and    writing said approximation in said memory format to said floating-point memory.    
     
     
         20 . The method of  claim 18 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         21 . The method of  claim 17 , further comprising the steps of: 
 setting said estimate (X i ) equal to said approximation; and    repeating steps (b) through (e).    
     
     
         22 . In a computer system having a floating-point unit, a method for determining the reciprocal square root of a number, comprising: 
 (a) providing an estimate instruction to the floating-point unit that enables the floating-point unit to produce an estimate (X i ) of the reciprocal square root of the number;    (b) providing a multiply instruction to the floating-point unit that enables the floating-point unit to produce a first intermediate result (IR1) equal to said estimate multiplied by said number;    (c) providing an instruction to said floating-point unit that enables the floating-point unit to produce a first intermediate result (IR1) according to the equation: IR2=(1−X i *IR1)/2; and    (d) providing a multiply-add instruction to said floating-point unit that enables the floating-point unit to produce an approximation (X i+1 ) of the reciprocal square root of the number according to the equation: X i+1 =X i +X i *IR2.    
     
     
         23 . A computer system having a processor in communication with a storing means for storing instructions that enable the processor to perform arithmetic operations, the instructions comprising: 
 a first instruction to enable the processor to produce an estimate (X i ) of a reciprocal square root of a number;    a multiply instruction to enable the processor to calculate a first intermediate result (IR1) of said estimate multiplied by said number;    a second instruction to enable the processor to produce a second intermediate result (IR2) according to the equation: IR2=(1−X i *IR1)/2; and    a third instruction to enable the processor to produce an approximation (X i+1 ) of the reciprocal square root of said number according to the equation: X i+1 =X i +X i *IR2.    
     
     
         24 . The computer system of  claim 23 , wherein said storing means comprises a random access memory for storing the instructions.  
     
     
         25 . The computer system of  claim 23 , wherein said processor is a floating-point unit, wherein said floating-point unit executes said first instruction to produce said estimate of the reciprocal square root of said number, executes said multiply instruction to calculate said first intermediate result, executes said second instruction to produce said second intermediate result, and executes said third instruction to produce said approximation.  
     
     
         26 . A computer system having a processor in communication with a storing means for storing instructions that enable the processor to perform arithmetic operations, the instructions comprising an instruction that enables the processor to produce an estimate (X i ) of the reciprocal square root of a number, calculate a first intermediate result (IR1) of said estimate multiplied by said number, produce a second intermediate result (IR2) according to the equation: IR2=(1−X i *IR1)/2, and produce an approximation (X i+1 ) of the reciprocal square root of said number according to the equation: X i+1 =X i +X i *IR2.  
     
     
         27 . The computer system of  claim 26 , wherein said instruction further enables the processor to first retrieve said number from a floating-point memory, wherein said number is stored in said memory in a memory format, and then enables the processor to unpack said number from said memory format to an internal format prior to enabling the processor to produce said estimate.  
     
     
         28 . The computer system of  claim 27 , wherein said approximation is in said internal format, and wherein said instruction further enables the processor to pack said approximation from said internal format to said memory format, and to write said approximation in said memory format to said floating-point memory.  
     
     
         29 . The computer system of  claim 27 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         30 . A computer program product comprising a computer useable medium having floating-point instructions stored therein, the floating-point instructions for enabling a floating-point unit to approximate the reciprocal square root of a number (N), wherein the floating-point instructions comprise: 
 a first instruction to enable the floating-point unit to produce an estimate (X i ) of the reciprocal square root of said number;    a multiply instruction to enable the floating-point unit to produce a first intermediate result (IR1) equal to said estimate multiplied by said number;    a second instruction to enable the floating-point unit to produce a second intermediate result (IR2) according to the equation: IR2=(1−X i *IR1)/2; and    a third instruction to enable the floating-point unit to produce an approximation (X i+1 ) of the reciprocal square root of said number according to the equation: X i+1 =X i +X i *IR2.    
     
     
         31 . A computer program product comprising a computer useable medium having a floating-point instruction stored therein, the floating-point instruction for enabling a floating-point unit to approximate the reciprocal square root of a number (N), wherein the floating-point instruction enables the floating-point unit to produce an estimate (X i ) of the reciprocal square root of said number, produce a first intermediate result (IR1) equal to said estimate multiplied by said number, produce a second intermediate result (IR2) according to the equation: IR2=(1−X i *IR1)/2, and produce an approximation (X i+1 ) of the reciprocal square root of said number according to the equation: X i+1 =X i +X i *IR2.  
     
     
         32 . The computer program product of  claim 31 , wherein said floating-point instruction enables the floating-point unit to first retrieve said number from a floating-point memory, wherein said number is stored in said memory in a memory format, and then enables the floating-point unit to unpack said number from said memory format to an internal format prior to enabling the floating-point unit to produce said estimate.  
     
     
         33 . The computer program product of  claim 32 , wherein said approximation is in said internal format, and wherein said floating-point instruction further enables the floating-point unit to pack said approximation from said internal format to said memory format, and to write said approximation in said memory format to said floating-point memory.  
     
     
         34 . The computer program product of  claim 32 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.  
     
     
         35 . A computer system, comprising: 
 a floating-point unit;    a memory for storing a sequence of instructions that enables said floating-point unit to approximate the reciprocal square root of a number (N), said sequence of instructions comprising: 
 a first instruction to enable said floating-point unit to produce an estimate (X i ) of the reciprocal square root of said number;  
 a multiply instruction to enable said floating-point unit to produce a first intermediate result (IR1) equal to said estimate multiplied by said number;  
 a second instruction to enable said floating-point unit to produce a second intermediate result (IR2) according to the equation: IR2=(1−X i *IR1)/2; and  
 a third instruction to enable said floating-point unit to produce an approximation (X i+1 ) of the reciprocal square root of said number according to the equation: X i+1 =X i +X i *IR2; and  
 an instruction dispatch unit for dispatching said sequence of instructions from said memory to said floating-point unit.  
   
     
     
         36 . The computer system of  claim 35 , wherein said floating-point unit comprises: 
 a floating-point register file that stores said number in a memory format;    a floating-point pipe file coupled to said floating-point register file, wherein said floating-point pipe file selects said number from said floating-point register file and unpacks said number into an internal format; and    a floating-point arithmetic unit, coupled to said pipe file, that receives said unpacked number from said pipe file and performs an arithmetic operation using said number to produce a result in said internal format.    
     
     
         37 . The computer system of  claim 36 , wherein said result is sent to said pipe file, said pipe file packs said result into said memory format, and said pipe file writes said result in said memory format to said floating-point register file.  
     
     
         38 . The computer system of  claim 36 , wherein said arithmetic unit comprises a floating-point mantissa multiplier coupled to said pipe file.  
     
     
         39 . The computer system of  claim 36 , wherein said arithmetic unit comprises a floating-point mantissa adder coupled to said mantissa multiplier.  
     
     
         40 . The computer system of  claim 39 , wherein said internal format has an exponent of at least 12-bits, and said memory format has an exponent of not more than 11-bits.