Reduction of shorts among electrical cells formed on a semiconductor substrate

Abstract

An integrated circuit, such as a DRAM circuit, having a plurality of cells is formed in containers formed an isolation layer positioned on an first surface of a semiconductor substrate. The containers have a first region located proximal the first surface of the semiconductor substrate that has a first cross-sectional area and a second region located distal from the first surface of the semiconductor substrate that has a second cross-sectional area that is less than the first cross-sectional area. Cells, such as capacitors, are formed in the containers and the isolation material positioned between adjacent cells is removed so that a generally horizontal surface is formed. The horizontal surface is located closer to the first surface of the substrate than the transition between the first region and the second region of the container so that substantially vertical surfaces are formed in the isolation region linking the cells to the horizontal surface of the isolation layer. The addition of the vertical surfaces on the isolation region increases the surface path upon which leakage current will flow between adjacent cells thereby decreasing the likelihood of leakage currents travelling from one cell to an adjacent cell.

What is claimed is:  
     
         1 . A method of forming electrical cells on a semiconductor substrate comprising: 
 positioning at least one isolation layer on a first surface of the semiconductor substrate;    forming a plurality of cell containers in the at least one isolation layer so that the plurality of cell containers are at least a first distance apart;    positioning cells in the plurality of cell containers so that the outer boundary of the cells conform to the inner surface of the cell containers; and    contouring the at least one isolation layer between the plurality of cell containers so that a surface path for current to travel between the adjacent cells is greater than the first distance between the cell containers.    
     
     
         2 . The method of  claim 1 , wherein forming the plurality of cell containers comprises forming cell containers so that the cell containers include a first region and a second region so that the first region has a first cross-sectional area and the second region has a second cross- sectional area greater than the first cross-sectional area.  
     
     
         3 . The method of  claim 2 , wherein contouring the at least one isolation layer comprises removing the at least one isolation layer between adjacent cells so that an outer surface of the at least one isolation layer is located so as to be in a plane that intersects the first region of the cell containers such that a surface path interconnecting the portion of the cells in the second region of the adjacent cell containers includes at least one path length extending in a direction so as to intercept the outer surface of the at least one isolation layer.  
     
     
         4 . The method of  claim 3 , wherein contouring the at least one isolation layer comprises removing the at least one isolation layer so that the surface path between the adjacent cells in the containers includes two vertical paths extending in a direction substantially perpendicular to the first surface of the semiconductor substrate.  
     
     
         5 . The method of  claim 1 , wherein positioning at least one isolation layer on the first surface of the substrate comprises positioning a first isolation layer on the first surface of the substrate and then positioning a second isolation layer on top of the first isolation layer.  
     
     
         6 . The method of  claim 5 , wherein forming the plurality of cell containers comprises forming the cell containers so that the portion of the cell container in the second isolation layer has a substantially uniform cross-sectional area and so that the portion of the cell container in the first isolation layer has a tapered cross-sectional area so that the cross-sectional area decreases in size from a transition point towards the first surface of the substrate.  
     
     
         7 . The method of  claim 6 , wherein contouring the at least one isolation layer comprises removing a portion of the first and the second isolation layers so that a surface connecting adjacent cells is formed in the first isolation layer and so that the surface in the first isolation layer is located at a distance from the first surface of the substrate that is less than the distance of the transition point from the first surface of the substrate.  
     
     
         8 . The method of  claim 7 , wherein contouring the at least one isolation layer further comprises removing a portion of the first isolation layer so as to form the surface connecting the adjacent cells such that the surface includes a first and a second substantially vertical section and a substantially horizontal section such that the first and second substantially vertical sections engage with the outer surface of the cells formed in the second regions of the cell containers and extend in a direction substantially perpendicular to the plane of the first surface of the substrate and so that the horizontal section extends in a direction substantially parallel to the plane of the first surface of the substrate and interconnects the first and second vertical sections.  
     
     
         9 . The method of  claim 1 , wherein positioning cells in the plurality of cell containers comprises forming capacitors in the cell containers.  
     
     
         10 . The method of  claim 9 , wherein forming capacitors in the cell containers comprises: 
 forming a first electrode in the plurality of cell containers such that the first electrode conforms to the inner walls of the cell containers;    positioning a dielectric on the first electrodes formed in the plurality of cell containers; and    forming a second electrode on the dielectric in the plurality of cell containers.    
     
     
         11 . A method of forming electrical cells on a semiconductor substrate comprising: 
 positioning at least one isolation layer on a first surface of the semiconductor substrate;    forming a plurality of cell containers in the at least one isolation layer, so that the cell containers have a first region of a first cross-sectional area adjacent the first surface of the semiconductor substrate and a second region of a second cross-sectional area greater than the first cross-sectional area adjacent an upper surface of the isolation layer;    positioning cells in the plurality of cell containers so that the cells outer boundary conforms to the inner surface of the cell containers;    contouring the at least one isolation layer between the plurality of cell containers so that a surface path linking the plurality of cells over the isolation layer includes at least one section that is not parallel to the plane of the semiconductor substrate to thereby increase the path length of a surface path linking the plurality of cells.    
     
     
         12 . The method of  claim 11  wherein positioning the at least one isolation layer on the first surface of the substrate comprises positioning a first isolation layer on the first surface of the substrate and then positioning a second isolation layer on top of the first isolation layer.  
     
     
         13 . The method of  claim 12 , wherein forming the plurality of cell containers comprises forming the cell containers so that the portion of the cell container in the second isolation layer has a substantially uniform cross-sectional area and so that the portion of the cell container in the first isolation layer has a tapered cross-sectional area so that the cross-sectional area decreases in size from a transition point towards the first surface of the substrate.  
     
     
         14 . The method of  claim 13 , wherein contouring the at least one isolation layer comprises removing a portion of the first and the second isolation layers so that a surface connecting adjacent cells is formed in the first isolation layer and so that the surface in the first isolation layer is located at a distance from the first surface of the substrate that is less than the distance of a transition point between the first and second regions of the cell containers from the first surface substrate.  
     
     
         15 . The method of  claim 14 , wherein contouring the at least one isolation layer further comprises removing a portion of the first isolation layer so as to form the surface connecting the adjacent cells such that the surface includes a first and a second substantially vertical section and a substantially horizontal section such that the first and second vertical sections engage with the outer surface of the cells formed in the second regions of the cell containers and extend in a direction substantially perpendicular to the plane of the first surface of the substrate and so that the substantially horizontal section interconnects the first and second vertical sections.  
     
     
         16 . The method of  claim 27 , wherein positioning cells in the plurality of cell containers comprises forming capacitors in the cell containers.  
     
     
         17 . The method of  claim 16 , wherein forming capacitors in the cell containers comprises: 
 forming a first electrode in the plurality of cell containers such that the first electrode conforms to the inner walls of the cell containers;    positioning a dielectric on the first electrodes formed in the plurality of cell containers; and    forming a second electrode on the dielectric in the plurality of cell containers.    
     
     
         18 . The method of  claim 17 , further comprising texturing the first and second electrodes so as to increase the surface area to increase the capacitance of the cells.  
     
     
         19 . The method of  claim 18 , wherein texturing the first and second electrodes comprises seeding the electrodes with a seeding material and then annealing the seeded electrodes to produces hemispherically grained morphology electrode surfaces.  
     
     
         20 . The method of  claim 19 , wherein contouring the at least one isolation layer between the plurality of cell containers results in removal of excess seeding material from the at least one isolation layer without damaging the seeded electrodes.  
     
     
         21 . The method of  claim 17 , further comprising forming an access device in the first surface of the substrate so that the access device is electrically connected to the first electrode.  
     
     
         22 . The method of  claim 21 , wherein forming an access device comprises forming a transistor in the first surface of the semiconductor substrate.