Preventing unauthorized updates to a non-volatile memory

Abstract

An apparatus and method for preventing unauthorized updates to a non-volatile memory. A sequence of encoded values is received in a non-volatile memory device and decoded by a decoding circuit in the non-volatile memory device to generate a sequence of decoded values. The sequence of decoded values is stored in the non-volatile memory device.

What is claimed is:  
     
         1 . A method comprising the steps of: 
 receiving a sequence of encoded values in a non-volatile memory device;    decoding the sequence of encoded values in a decoding circuit within the non-volatile memory device to generate a sequence of decoded values; and    storing the sequence of decoded values in the non-volatile memory device.    
     
     
         2 . The method of  claim 1  further comprising the step of encoding a sequence of processor instructions to generate the sequence of encoded values.  
     
     
         3 . The method of  claim 2  wherein the step of encoding a sequence of processor instructions includes the step of encoding Basic Input/Output Services (BIOS) program code, the BIOS program code including program code for booting a computer system.  
     
     
         4 . The method of  claim 2  wherein the step of encoding a sequence of processor instructions includes the step of logically combining the sequence of processor instructions with a sequence of values generated by a first sequence generator.  
     
     
         5 . The method of  claim 4  wherein the step of logically combining includes the step of combining the sequence of processor instructions with the sequence of values generated by the sequence generator in one or more exclusive OR operations.  
     
     
         6 . The method of  claim 4  wherein the step of decoding the sequence of encoded values includes the step of logically combining the sequence of encoded values with a sequence of values generated by a second sequence generator.  
     
     
         7 . The method of  claim 6  wherein the sequence of values generated by the second sequence generator is the same as the sequence of values generated by the first sequence generator.  
     
     
         8 . The method of  claim 1  wherein the non-volatile memory device is an electrically erasable, programmable read-only memory (EEPROM).  
     
     
         9 . The method of  claim 8  wherein the EEPROM is a flash EEPROM.  
     
     
         10 . A non-volatile memory device comprising: 
 storage elements;    writing circuitry to receive encoded data from a data path and to store the data in the storage elements; and    decoding circuitry coupled to the writing circuitry to decode the encoded data received from the data path before the writing circuitry stores the data in the storage elements.    
     
     
         11 . The non-volatile memory device of  claim 10  wherein the decoding circuitry includes: 
 a sequence generator to generate a sequence of values; and  
 logic to combine the sequence of values with the encoded data to decode the encoded data.  
 
     
     
         12 . The non-volatile memory device of  claim 11  wherein the sequence generator is a pseudo-random sequence generator.  
     
     
         13 . The non-volatile memory device of  claim 11  wherein the logic to combine the sequence of values includes logic to combine the sequence of values with the encoded data received from the data path in one or more exclusive OR operations.  
     
     
         14 . The non-volatile memory device of  claim 10  wherein the encoded data is encoded program code.  
     
     
         15 . The non-volatile memory device of  claim 10  wherein the non-volatile memory device is a flash electrically erasable, programmable read-only memory (flash EPROM).  
     
     
         16 . An apparatus comprising: 
 storage means for storing data;    writing means for receiving encoded data from a data path and storing the data in the storage means; and    decoding means coupled to the writing means for decoding the data received from the data path before the writing means stores the data in the storage means.    
     
     
         17 . The apparatus of  claim 16  wherein the decoding means includes: 
 means for generating a sequence of values; and  
 means for combining the sequence of values with the encoded data to decode the encoded data.  
 
     
     
         18 . A computer system comprising: 
 a processor;    a datapath coupled to the processor and    a flash electrically erasable, programmable read-only memory (flash EPROM) coupled to the datapath, the flash EPROM including 
 storage elements,  
 writing circuitry to receive encoded data from the processor via the data path and to store the data in the storage elements, and  
 decoding circuitry coupled to the writing circuitry to decode the encoded data received from the processor before the writing circuitry stores the data in the storage elements.  
   
     
     
         19 . The computer system of  claim 18  wherein the decoding circuitry includes: 
 a sequence generator to generate a sequence of values; and  
 logic to combine the sequence of values with the encoded data to decode the encoded data.  
 
     
     
         20 . A method comprising the steps of: 
 storing a sequence of encoded values in storage elements of a non-volatile memory device;    retrieving the encoded sequence of values from the storage elements in response to a read request;    decoding the encoded sequence of values in a decoding circuit within the non-volatile memory device to generate a sequence of decoded values; and    outputting the sequence of decoded values.    
     
     
         21 . A non-volatile memory device comprising: storage elements; 
 reading circuitry to retrieve encoded data from the storage elements and to output the data on a data path; and    decoding circuitry coupled to the reading circuitry to decode the encoded data retrieved from the storage elements before the reading circuitry outputs the data on the data path.    
     
     
         22 . A method comprising: 
 receiving an encoded sequence of values by a non-volatile memory device;    storing the encoded sequence of values in the non-volatile memory device; and    decoding the stored encoded sequence of values by the non-volatile memory device.    
     
     
         23 . The method of  claim 22 , wherein the receiving comprises receiving encoded program code.  
     
     
         24 . The method of  claim 22 , wherein the receiving comprises receiving encoded basic input/output system (BIOS) program code.  
     
     
         25 . The method of  claim 22 , comprising encoding a sequence of values to generate the encoded sequence of values.  
     
     
         26 . The method of  claim 25 , wherein the encoding comprises combining the sequence of values and another sequence of values.  
     
     
         27 . The method of  claim 26 , wherein the combining comprises performing an exclusive-OR operation.  
     
     
         28 . The method of  claim 22 , wherein the decoding comprises combining values of the stored encoded sequence of values and another sequence of values.  
     
     
         29 . The method of  claim 28 , wherein the combining comprises performing an exclusive-OR operation.  
     
     
         30 . The method of  claim 22 , wherein the decoding comprises combining values of the stored encoded sequence of values and another sequence of values used to generate the stored encoded sequence of values.  
     
     
         31 . The method of  claim 22 , wherein the decoding comprises retrieving the stored encoded sequence of values in response to a read request and decoding the retrieved encoded sequence of values.  
     
     
         32 . The method of  claim 22 , wherein the non-volatile memory device comprises an electrically erasable, programmable read-only memory (EEPROM) device.  
     
     
         33 . The method of  claim 22 , wherein the non-volatile memory device comprises a flash electrically erasable, programmable read-only memory (EEPROM) device.  
     
     
         34 . An apparatus comprising: 
 non-volatile storage elements;    circuitry to store an encoded sequence of values in the non-volatile storage elements; and    circuitry to decode the stored encoded sequence of values.    
     
     
         35 . The apparatus of  claim 34 , wherein the encoded sequence of values comprises encoded program code.  
     
     
         36 . The apparatus of  claim 34 , wherein the encoded sequence of values comprises encoded basic input/output system (BIOS) program code.  
     
     
         37 . The apparatus of  claim 34 , wherein the circuitry to decode comprises a sequence generator to generate another sequence of values and circuitry to combine the generated sequence of values and values of the stored encoded sequence of values.  
     
     
         38 . The apparatus of  claim 37 , wherein the sequence generator comprises a pseudo-random sequence generator.  
     
     
         39 . The apparatus of  claim 37 , wherein the circuitry to combine comprises an exclusive-OR gate.  
     
     
         40 . The apparatus of  claim 37 , the sequence generator to generate another sequence of values used to generate the encoded sequence of values.  
     
     
         41 . The apparatus of  claim 34 , comprising circuitry to retrieve the stored encoded sequence of values from the non-volatile storage elements in response to a read request.  
     
     
         42 . The apparatus of  claim 34 , wherein the non-volatile storage elements comprise electrically erasable, programmable read-only memory (EEPROM) storage elements.  
     
     
         43 . The apparatus of  claim 34 , wherein the non-volatile storage elements comprise flash electrically erasable, programmable read-only memory (EEPROM) storage elements.  
     
     
         44 . A system comprising: 
 a processor;    a datapath coupled to the processor; and    a non-volatile memory device coupled to the datapath, the non-volatile memory device comprising non-volatile storage elements, circuitry to store in the non-volatile storage elements an encoded sequence of values received from the processor, and circuitry to decode the stored encoded sequence of values.    
     
     
         45 . The system of  claim 44 , wherein the encoded sequence of values comprises encoded program code.  
     
     
         46 . The system of  claim 44 , wherein the encoded sequence of values comprises encoded basic input/output system (BIOS) program code.  
     
     
         47 . The system of  claim 44 , wherein the circuitry to decode comprises a sequence generator to generate another sequence of values and circuitry to combine the generated sequence of values and values of the stored encoded sequence of values.  
     
     
         48 . The system of  claim 47 , wherein the sequence generator comprises a pseudo-random sequence generator.  
     
     
         49 . The system of  claim 47 , wherein the circuitry to combine comprises an exclusive-OR gate.  
     
     
         50 . The system of  claim 47 , the sequence generator to generate another sequence of values used to generate the encoded sequence of values.  
     
     
         51 . The system of  claim 44 , comprising circuitry to retrieve the stored encoded sequence of values from the non-volatile storage elements in response to a read request.  
     
     
         52 . The system of  claim 44 , wherein the non-volatile storage elements comprise electrically erasable, programmable read-only memory (EEPROM) storage elements.  
     
     
         53 . The system of  claim 44 , wherein the non-volatile storage elements comprise flash electrically erasable, programmable read-only memory (EEPROM) storage elements.