Composite gate dielectric layer

Abstract

A semiconductor device having composite dielectric layer formed between a silicon substrate and a gate electrode. The composite gate dielectric layer including a layer of silicon oxide, SiO X≦2 , having a dielectric constant of greater than about 3.9 and about 12 or less, and a complementary dielectric layer for inhibiting the flow of leakage current through the composite dielectric layer.

1 . A semiconductor device comprising: 
 a conductive layer;    a silicon substrate; and    a composite gate dielectric layer formed between the silicon substrate and the conductive layer, the composite gate dielectric layer comprising: 
 a layer of silicon oxide, SiO X≦2 , having dielectric constant greater than about 3.9 and about ≦12; and  
 a complementary dielectric layer disposed upon the layer of silicon oxide.  
   
     
     
         2 . The semiconductor device of  claim 1 , wherein the layer of silicon oxide has a thickness of about ≦5 Å.  
     
     
         3 . The semiconductor device of  claim 2 , wherein the complementary dielectric layer has a dielectric constant greater than about the dielectric constant of the layer of silicon oxide.  
     
     
         4 . The semiconductor device of  claim 3 , wherein the complementary dielectric layer comprises at least one of an aluminate, silicate, ZrO 2 , HfO 2 , TiO 2 , Gd 2 O 3 , Y 2 O 3 , Si 3 N 4 , Ta 2 O 5  and Al 2 O 3 .  
     
     
         5 . A semiconductor device comprising: 
 a layer of silicon oxide, SiO X≦2 , formed upon a semiconductor substrate, the layer of silicon oxide having a dielectric constant greater than about 3.9 and about ≦12; and    a complementary dielectric layer disposed upon the layer of silicon oxide.    
     
     
         6 . The semiconductor device of  claim 5 , wherein the layer of silicon oxide has a thickness of about ≦5 Å.  
     
     
         7 . The semiconductor device of  claim 6 , wherein the complementary dielectric layer has a dielectric constant greater than about the dielectric constant of the layer of silicon oxide.  
     
     
         8 . The semiconductor device of  claim 7 , wherein the complementary dielectric layer comprises at least one of an aluminate, silicate, ZrO 2 , HfO 2 , TiO 2 , Gd 2 O 3 , Y 2 O 3 , Si 3 N 4 , Ta 2 O 5  and Al 2 O 3 .  
     
     
         9 . A method of fabricating a composite gate dielectric layer comprising the step of: 
 forming a complementary dielectric layer upon a layer of silicon oxide, SiO X≦2 , the layer of silicon oxide having a thickness of about ≦5 Å and a dielectric constant greater than about 3.9 and about ≦12.    
     
     
         10 . The method of  claim 9 , wherein step of forming a complementary dielectric layer upon a layer of silicon oxide comprises the steps of: 
 forming a first monolayer of oxygen upon a silicon substrate by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition and low pressure chemical vapor deposition;    forming a monolayer of silicon upon the first monolayer of oxygen by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition and low pressure chemical vapor deposition;    forming a second monolayer of oxygen upon the monolayer of silicon by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition and low pressure chemical vapor deposition; and    growing the complementary dielectric layer upon the second monolayer of oxygen.    
     
     
         11 . The method of  claim 10 , wherein the complementary dielectric layer is grown by at least one of metal organic chemical vapor deposition and low pressure chemical vapor deposition.  
     
     
         12 . The method of  claim 9  wherein the step of forming a complementary dielectric layer upon a layer of silicon oxide comprises the steps of: 
 growing a layer of silicon dioxide upon a silicon substrate;  
 implanting a transition metal into the layer of silicon dioxide; and  
 annealing the implanted silicon dioxide layer to form the layer of silicon oxide and the complementary dielectric layer.  
 
     
     
         13 . The method of  claim 12 , wherein the transition metal comprises at least one of Zr, Hf and Ti.  
     
     
         14 . The method of  claim 9 , wherein the step of forming a complementary dielectric layer upon a layer of silicon oxide comprises the steps of: 
 forming a metal-silicide upon a silicon substrate; and    annealing the metal-silicide to form the layer of silicon oxide upon the silicon substrate and the complementary dielectric layer upon the layer of silicon oxide.    
     
     
         15 . The method of  claim 14 , wherein the step of forming a metal-silicide upon a silicon substrate comprises the step of heating a silicide to release metal atoms into an O 2  atmosphere.  
     
     
         16 . The method of  claim 14 , wherein the step of annealing is performed in an O 2  atmosphere at a temperature of about 800° C. for a time of less than about 5 seconds.  
     
     
         17 . The method of  claim 14 , wherein the step of forming a metal-silicide upon a silicon substrate comprises the step of at least one of sputtering metal atoms in an O 2  atmosphere, evaporating metal atoms in an O 2  atmosphere, and chemical vapor depositing metal atoms in an O 2  atmosphere.