US2002100165A1PendingUtilityA1

Method of forming an integrated circuit device package using a temporary substrate

Assignee: AMKOR TECHNOLOGY INCPriority: Feb 14, 2000Filed: Feb 14, 2000Published: Aug 1, 2002
Est. expiryFeb 14, 2020(expired)· nominal 20-yr term from priority
Inventors:Thomas P. Glenn
H10W 90/756H10W 74/127H10W 74/00H10W 72/07504H10W 72/5525H10W 72/5524H10W 72/5445H10W 72/952H10W 72/0198H10W 72/59H10W 72/50H10W 72/29H10W 74/111H10W 74/014H10W 74/01H10W 70/457H10W 70/424H10W 70/421H10W 74/019Y10T29/49155Y10T29/4913Y10T29/49146Y10T29/49117
38
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Claims

Abstract

Abstract of Disclosure Methods for forming packages for housing an integrated circuit device are disclosed. In one embodiment, a plastic sheet having an first surface is provided. An array of package sites is formed on the first surface of the plastic sheet. The package sites each include a metal die pad and leads surrounding the die pad. The package sites may be formed by applying a first metal layer on the first surface of the plastic sheet, and then applying a second metal layer in a pattern that defines the die pads and leads of the package sites. The first metal layer is then selectively etched using the second metal layer as an etch mask. Next, an integrated circuit die is placed on each die pad of the array. The die is electrically connected to the leads surrounding the respective die pad. An encapsulant is applied onto the first surface of the plastic sheets so as to cover the package sites. The plastic layer is removed by peeling, by dissolving the plastic sheet, or dissolving an adhesive connection between the plastic sheet and the encapsulated array. The packages are then singulated from the array.

Claims

exact text as granted — not AI-modified
Claims 
     
         1. A method of forming a package for an integrated circuit device comprising: 
       providing a plastic sheet having a first surface; 
       applying a first metal layer to the first surface of the plastic sheet; 
       patterning the first metal layer so as to form an array of package sites, wherein each package site formed includes a die pad and a plurality of leads adjacent to the die pad; 
       placing an integrated circuit device on each die pad of the array; 
       electrically connecting each integrated circuit device to at least some of the leads adjacent to the die pad on which the integrated circuit device is placed; 
       applying an encapsulating material onto the array and the first surface of the plastic sheet so that each package site is encapsulated; 
       removing the plastic sheet from the array; and 
       separating individual packages from the encapsulated array, wherein a planar first surface of the die pad and leads of the packages is exposed at an external surface of each package. 
     
     
         2. The method of  claim 1 , wherein removing the plastic sheet comprises using a solvent to dissolve a connection between the array and the plastic sheet so that the plastic sheet may be separated from the array. 
     
     
         3. The method of  claim 2 , wherein an adhesive material is applied to the first surface of the plastic sheet prior to application of the metal layer. 
     
     
         4. The method of  claim 1 , wherein applying the first metal layer to the first surface of the plastic sheet comprises: 
       providing a sheet of metal: and 
       attaching the sheet of metal to the first surface of the plastic sheet with an adhesive. 
     
     
         5. The method of  claim 4 , wherein removing the plastic sheet comprises using a solvent to dissolve a connection between the array and the plastic sheet so that the plastic sheet may be separated from the array. 
     
     
         6. The method of  claim 1 , wherein the first metal layer comprises a layer of one type of metal plated with one or more layers of another type of metal. 
     
     
         7. The method of  claim 1 , wherein patterning the metal layer comprises: 
       applying a second metal layer in a pattern on the first metal layer, wherein the pattern of the second metal layer defines said package sites; and 
       selectively etching the first metal layer to form said package sites using said second metal layer as a mask. 
     
     
         8. The method of  claim 7 , wherein the first metal layer comprises copper and the second metal layer is gold. 
     
     
         9. The method of  claim 8 , wherein the first metal layer comprises a layer of copper and a layer of nickel, wherein said gold is applied onto said layer of nickel. 
     
     
         10. A method of forming a package for an integrated circuit device comprising: 
       providing a substrate sheet having a first surface; 
       applying a first layer of an electrically conductive material on the substrate sheet, wherein said first layer is applied in a pattern that defines an array of package sites, wherein each package site formed includes a die pad and a plurality of leads adjacent to the die pad; 
       placing an integrated circuit device on each die pad of the array; 
       electrically connecting each integrated circuit device to at least some of the leads adjacent to the die pad on which the integrated circuit device is placed; 
       applying an encapsulating material onto the array and the first surface of the substrate sheet so that each package site is encapsulated; 
       removing the substrate sheet from the array; and 
       separating individual packages from the encapsulated array, wherein a planar first surface of the die pad and leads of the packages is exposed at an external surface of the package. 
     
     
         11. The method of  claim 10 , further comprising applying a second layer of an electrically conductive material on the die pads and leads so that the second layer overhangs the first layer. 
     
     
         12. The method of  claim 11 , wherein the substrate sheet is a plastic material. 
     
     
         13. The method of  claim 12 , wherein the first and second layers of electrically conductive material are applied by silk screening. 
     
     
         14. The method of  claim 12 , wherein the first and second layers of electrically conductive material are applied using a stencil. 
     
     
         15. A method of forming a package for an integrated circuit device comprising: 
       providing a plastic sheet having a first surface; 
       applying a metal layer to the first surface of the first plastic sheet; 
       patterning the metal layer to form a die pad and a plurality of leads adjacent to the die pad; 
       placing an integrated circuit device on the die pad; 
       consecutively connecting the integrated circuit device to one or more of the leads; 
       applying an encapsulating material so that the integrated circuit device and the first surface of the plastic sheet are covered by the encapsulant material; and 
       removing the plastic sheet, wherein a planar first surface of the die pad and a first surface of the leads are exposed at an exterior surface of the package. 
     
     
         16. The method of  claim 15 , wherein removing the plastic sheet comprises using a solvent to dissolve a connection between the die pad and leads and the plastic sheet so that the plastic sheet may be separated therefrom. 
     
     
         17. The method of  claim 15 , wherein applying the first metal layer to the first surface of the plastic sheet comprises: 
       providing a sheet of metal: and 
       attaching the sheet of metal to the first surface of the plastic sheet with an adhesive. 
     
     
         18. The method of  claim 15 , wherein patterning the metal layer comprises: 
       applying second metal layer in a pattern on the first metal layer, wherein the pattern of the second metal layer defines said package sites; and 
       selectively etching the first metal layer to form said package sites using said second metal layer as a mask. 
     
     
         19. The method of  claim 18 , wherein the first metal layer comprises copper and the second metal layer is gold. 
     
     
         20. A method of forming a package for an integrated circuit device comprising:providing a substrate sheet having a first surface; 
       applying a first layer of a electrically conductive material on the substrate sheet, wherein said first layer is applied in a pattern that defines an array of package sites, wherein each package site formed includes a die pad and a plurality of leads adjacent to the die pad; 
       placing an integrated circuit device on the die pad; 
       consecutively connecting the integrated circuit device to one or more of the leads; 
       applying an encapsulating material so that the integrated circuit device and the first surface of the substrate sheet are covered by the encapsulant material; and 
       removing the substrate sheet, wherein a planar first surface of the die pad and a first surface of the leads are exposed at an exterior surface of the package. 
     
     
         21. The method of  claim 20 , further comprising applying a second layer of an electrically conductive material on the die pads and leads so that the second layer overhangs the first layer. 
     
     
         22. The method of  claim 21 , wherein the substrate sheet is formed of a plastic material, and the plastic sheet is removed by peeling or dissolving the plastic sheet in a solvent. 
     
     
         23. The method of  claim 21 , wherein the substrate sheet is formed of a plastic material, and an adhesive connection between the plastic sheet and the encapsulated array is dissolved with a solvent. 
     
     
         24. The method of  Claim 1 , wherein removing the plastic sheet includes subjecting the plastic sheet to ultraviolet light.

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