Method for producing an integrated circuit having at least one metalicized surface

Abstract

In order to fabricate a metallization plane with lines and contacts, four dielectric layers are applied to a substrate. Firstly, contact holes are etched through the top two dielectric layers into the underlying dielectric layer, the remaining thickness of the latter layer being essentially equal to the thickness of the top layer. Line trenches are subsequently etched selectively with respect to the first dielectric layer and the third dielectric layer, whose surfaces are uncovered essentially simultaneously. After the first dielectric layer and the third dielectric layer have been patterned, contacts and lines are produced in the contact holes and line trenches.

1 . A method for fabricating an integrated circuit having at least one metallization plane, 
 in which a first dielectric layer, a second dielectric layer, a third dielectric layer and a fourth dielectric layer are applied to a surface of a substrate, in each case the first dielectric layer and the third dielectric layer, and the second dielectric layer and the fourth dielectric layer, having the same etching properties and the thickness of the second dielectric layer differing from the thickness of the fourth dielectric layer,    in which, using a first etching mask, which defines the arrangement of contact holes if the thickness of the second dielectric layer is greater than the thickness of the fourth dielectric layer, etching is effected through the fourth dielectric layer and the third dielectric layer into the second dielectric layer to a depth such that the remaining thickness of the second dielectric layer is essentially equal to the thickness of the fourth dielectric layer, and, if the thickness of the fourth dielectric layer is greater than the thickness of the second dielectric layer, etching is effected into the fourth dielectric layer to a depth such that the remaining thickness of the fourth dielectric layer is essentially equal to the thickness of the second dielectric layer,    in which, using a second etching mask, which defines the arrangement of line trenches, firstly a non-selective etching process is carried out, by means of which etching is effected into the fourth dielectric layer and the second dielectric layer without the surface of the underlying third dielectric layer and first dielectric layer being uncovered, and then the fourth dielectric layer and the second dielectric layer are etched selectively with respect to the third dielectric layer and selectively with respect to the first dielectric layer until the underlying surfaces of the first and of the third dielectric layer are uncovered in each case,    in which the third dielectric layer and the first dielectric layer are etched until the underlying surface is uncovered in each case,    in which metal-containing contacts and lines of the metallization plane are produced in the contact holes and in the line trenches.    
     
     
         2 . The method as claimed in  claim 1 , 
 in which the etching of the fourth dielectric layer, of the third dielectric layer and of the second dielectric layer using the first etching mask is carried out with the aid of a non-selective etching process.    
     
     
         3 . The method as claimed in  claim 1  or  2 , 
 in which in each case the first dielectric layer and the third dielectric layer, and the second dielectric layer and the fourth dielectric layer, have essentially the same material composition.  
 
     
     
         4 . The method as claimed in  claim 3 , 
 in which the first dielectric layer and the third dielectric layer contain Si 3 N 4  and the second dielectric layer and the fourth dielectric layer contain SiO 2 .    
     
     
         5 . The method as claimed in one of  claims 1  to  4 , 
 in which the first dielectric layer and the third dielectric layer have essentially the same thickness.  
 
     
     
         6 . The method as claimed in one of  claims 1  to  5 , 
 in which the contacts and interconnects are formed by the deposition and planarization of metal.  
 
     
     
         7 . The method as claimed in one of  claims 1  to  6 , 
 in which the contacts and/or the interconnects contain copper.