Semiconductor integrated circuit device and method for producing same

Abstract

A semiconductor integrated circuit device comprises an n-type well 8 - 1 formed in a p-type silicon substrate 1, an n-type well 8 - 2 formed so as to surround a part of the substrate 1, in which a p − -type well is formed, a p − -type well 15 - 1 formed in the substrate 1, a p − -type well 15 - 2 formed in a part of the substrate 1, which is surrounded by the n-type well, an embedded n-type well 12 - 1 formed below the p-type well 15 - 1, and an n-type well 12 - 2 which is formed below the p − -type well 15 - 2 and which is connected to the n-type well 8 - 2. Thus, it is possible to provide a semiconductor integrated circuit device capable of suppressing the increase of the number of photolithography steps and reducing the manufacturing costs. Alternatively, low-voltage n-channel MOS transistors QN 1, QN 2 and low-voltage p-channel MOS transistors QP 1, QP 2 are formed in a p-type well 214 and n-type well 213 of a p − -type silicon substrate 211, respectively, and high-voltage n-channel MOS transistors QN 3, QN 4 are formed in the substrate 211. The p-type well 214, in which the transistors QN 1, QN 2 are formed, and the p-type element isolating layer 215 of the element isolating regions for the transistors QN 3, QN 4 are simultaneously formed by ion implantation using a resist mask by the lithography on a flat surface having no step. The p-type well 214 and the p-type element isolating layer 215 have the same depth from the substrate surface of the element regions and the same impurity density. Thus, it is possible to provide a semiconductor integrated circuit device capable of achieving good element isolation characteristics, and a method for producing the same.

What is claimed is:  
     
         1 . A semiconductor integrated circuit device comprising: 
 a semiconductor substrate of a first conductive type;    a first semiconductor region which is formed on said semiconductor substrate and which includes an impurity of a second conductive type;    a second annular semiconductor region which is formed on said semiconductor substrate and which includes an impurity of the second conductive type;    a third embedded semiconductor region which is formed in a region surrounded by said second annular semiconductor region and which includes an impurity of the second conductive type;    a fourth embedded semiconductor region which is formed on said semiconductor substrate and which includes an impurity of the second conductive type;    a fifth semiconductor region which is formed above said third embedded semiconductor region and which includes an impurity of the first conductive type;    a sixth semiconductor region which is formed above said fourth embedded semiconductor region and which includes an impurity of the first conductive type; and    a transistor formed in said first, fifth and sixth semiconductor regions.    
     
     
         2 . A semicoductor integrated circuit device as set forth in  claim 1 , wherein said first, fifth and sixth semiconductor regions are isolated by element isolating regions, respectively.  
     
     
         3 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 preparing a semiconductor substrate of a first conductive type;    introducing an impurity of a second conductive type, which serves to form a first semiconductor region of the second conductive type and a second annular semiconductor region of the second conductive type, into said semiconductor substrate using a first mask;    introducing an impurity of the second conductive type, which serves to form third and fourth embedded semiconductor regions of the second conductive type, into said semiconductor substrate and a region surrounded by said second annular semiconductor region using a second mask;    introducing an impurity of the first conductive type, which serves to form fifth and sixth semiconductor regions of the first conductive type, into regions above said third and fourth semiconductor regions using said second mask; and    forming a transistor in said first, fifth and sixth semiconductor regions.    
     
     
         4 . A method for producing a semiconductor integrated circuit device as set forth in  claim 3 , wherein said first to sixth semiconductor regions are formed after forming of said element isolating regions.  
     
     
         5 . A method for producing a semiconductor integrated circuit device as set forth in  claim 3 , wherein said first to sixth semiconductor regions are formed before forming of said element isolating regions.  
     
     
         6 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate;    introducing a first impurity, which serves to form a first semiconductor region, into said semiconductor substrate using a first mask;    introducing a second impurity, which serves to form a second semiconductor region, into said semiconductor substrate using a second mask;    removing said first gate insulator film using said second mask;    forming a second gate insulator film in a portion, from which said first gate insulator film has been removed, and increasing the thickness of a portion of said first gate insulator film, in which said first gate insulator film has been left; and    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         7 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate;    introducing a first impurity, which serves to form a first semiconductor region, into said semiconductor substrate using a first mask;    introducing a second impurity, which serves to form a second semiconductor region, into said semiconductor substrate and a region, into which said first impurity has been introduced, using a second mask;    introducing nitrogen ion into said second semiconductor region;    increasing the thickness of said gate insulator film on said first and second semiconductor regions so that the thickness of said gate insulator film on said first semiconductor region becomes thicker than that of said gate insulator film on said second semiconductor region; and    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         8 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate;    introducing a first impurity, which serves to form a first semiconductor region, into said semiconductor substrate using a first mask;    introducing a second impurity, which serves to form a second semiconductor region, into said semiconductor substrate and a region, into which said first impurity has been introduced, using a second mask;    removing said first gate insulator film using said second mask;    forming a second gate insulator film in a portion, from which said first gate insulator film has been removed, and increasing the thickness of a portion of said first gate insulator film, in which said first gate insulator film has been left; and    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         9 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate;    introducing a first impurity, which serves to form a first semiconductor region, into said semiconductor substrate using a first mask;    introducing a second impurity, which serves to form a second semiconductor region, into said semiconductor substrate and a region, into which said first impurity has been introduced, using a second mask;    introducing nitrogen ion into said second semiconductor region;    increasing the thickness of said gate insulator film on said first and second semiconductor regions so that the thickness of said gate insulator film on said first semiconductor region becomes thicker than that of said gate insulator film on said second semiconductor region; and    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         10 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate;    introducing a first impurity, which serves to form a first semiconductor region, into said semiconductor substrate using a first mask;    introducing a second impurity, which serves to form a second semiconductor region, into said semiconductor substrate using a second mask;    introducing a third impurity, which serves to form a third semiconductor region, into said semiconductor substrate, a region, into which said first impurity has been introduced, and a region, into which said second impurity has been introduced, using a third mask;    removing said first gate insulator film using said third mask;    forming a second gate insulator film in a portion, from which said first gate insulator film has been removed, and increasing the thickness of a portion of said first gate insulator film, in which said first gate insulator film has been left; and    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         11 . A method for producing a semiconductor integrated circuit device as set forth in  claim 10 , wherein said first to third semiconductor regions are isolated by the shallow trench isolator types element isolator regions, respectively.  
     
     
         12 . A method for producing a semiconductor integrated circuit device as set forth in  claim 10 , wherein said first to third semiconductor regions are isolated by LOCOS type element isolator regions, respectively.  
     
     
         13 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate of a first conductive type;    introducing a first impurity of a second conductive type, which serves to form a first semiconductor region of the second conductive type and a second annular semiconductor region of the second conductive type, into said semiconductor substrate using a first mask;    introducing a second impurity of the second conductive type, which serves to form third, fourth and fifth embedded semiconductor regions of the second conductive type, into said semiconductor substrate, a region surrounded by said second annular semiconductor region, and a region, into which said first impurity has been introduced, using a second mask;    introducing a third impurity of the first conductive type, which serves to form sixth, seventh and eighth semiconductor regions of the first conductive type, into regions above said third, fourth and fifth semiconductor regions, using said second mask;    removing said first gate insulator film using said second mask;    forming a second gate insulator film in a portion, from which said first gate insulator film has been removed, and increasing the thickness of a portion of said first gate insulator film, in which said first gate insulator film has been left; and    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         14 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming a first gate insulator film on a semiconductor substrate of a first conductive type;    introducing a first impurity of a second conductive type, which serves to form a first semiconductor region of the second conductive type and a second annular semiconductor region of the second conductive type, into said semiconductor substrate using a first mask;    introducing a second impurity of the second conductive type, which serves to form third, fourth and fifth embedded semiconductor regions of the second conductive type, into said semiconductor substrate, a region surrounded by said second annular semiconductor region, and a region, into which said first impurity has been introduced, using a second mask;    introducing a third impurity of the first conductive type, which serves to form sixth, seventh and eighth semiconductor regions of the first conductive type, into regions above said third, fourth and fifth semiconductor regions, using said second mask;    introducing nitrogen ion into said second semiconductor region;    increasing the thickness of said gate insulator film on said first and second semiconductor regions so that the thickness of said gate insulator film on said first semiconductor region becomes thicker than that of said gate insulator film on said second semiconductor region;    forming a transistor using said first gate insulator film, and a transistor using said second gate insulator film.    
     
     
         15 . A method for producing a semiconductor integrated circuit device as set forth in  claim 13 , wherein forming said forth and seventh semiconductor regions in a well of low impurity, said well being formed in advance.  
     
     
         16 . A semiconductor integrated circuit device comprising; 
 a first gate insulator film formed on a semiconductor substrate of a first conductive type;    a first semiconductor region which is formed on said semiconductor substrate and which includes an impurity of a second conductive type;    a second annular semiconductor region which is formed on said semiconductor substrate and which includes an impurity of the second conductive type;    a third embedded semiconductor region which is formed on said semiconductor substrate and which includes an impurity of the second conductive type;    a fourth embedded semiconductor region which is formed in a region surrounded by said second annular semiconductor region and which includes an impurity of the second conductive type;    a fifth embedded semiconductor region which is formed in said first semiconductor region and which includes an impurity of the second conductive type;    a sixth semiconductor region which is formed above said third semiconductor region and which includes an impurity of the first conductive type;    a seventh semiconductor region which is formed above said fourth embedded semiconductor region and which includes an impurity of said first conductive type;    an eighth semiconductor region which is formed above said fifth embedded semiconductor region and which includes an impurity of said first conductive type;    a second gate insulator film which is thinner than said first gate insulator film formed in said sixth, seventh and eighth semiconductor regions;    a transistor using said first gate insulator film; and    a transistor using said second gate insulator film.    
     
     
         17 . A semiconductor integrated circuit device comprising: 
 a semiconductor substrate;    a semiconductor region isolated from said substrate by an annular semiconductor region and an embedded semiconductor region; and    an EEPROM formed in said semiconductor region.    
     
     
         18 . A semiconductor integrated circuit device comprising: 
 a semiconductor substrate;    a first element region of a first conductive type defined in said semiconductor substrate by an element isolating insulator film;    a second element region of the first conductive type defined in said semiconductor substrate by said element isolating insulator film, said second element region having a lower impurity density than that of said first element region;    first and second transistors of a second conductive channel formed in said first and second element regions, respectively; and    an element isolating layer of the first conductive type formed below an element isolating insulator film adjacent to said second element region of said semiconductor substrate, said element isolating layer having an impurity density substantially equal to that of said first element region and a depth substantially equal to that of said first element region from the substrate surface of said first and second element regions.    
     
     
         19 . A semiconductor integrated circuit device comprising: 
 a semiconductor substrate of first conductive type;    a first well of a first conductive type defined in said semiconductor substrate by an element isolating insulator film;    a second well of the first conductive type defined in said semiconductor substrate by said element isolating insulator film, said second element region having a lower impurity density than that of said substrate and said first well;    first and second transistors of a second conductive channel formed in said first and second wells, respectively; and    an element isolating layer of the first conductive type formed below an element isolating insulator film adjacent to said second well of said semiconductor substrate, said element isolating layer having an impurity density substantially equal to that of said first well and a depth substantially equal to that of said first well from the substrate surface of said first and second wells.    
     
     
         20 . A semiconductor integrated circuit device comprising: 
 a semiconductor substrate of second conductive type;    an well of a second conductive type defined in said semiconductor substrate by an element isolating insulator film;    an element region of the second conductive type defined in said semiconductor substrate by said element isolating insulator film;    first and second transistors of a first conductive channel formed in said first and second wells, respectively; and    an element isolating layer of the second conductive type formed below an element isolating insulator film adjacent to said element region of said semiconductor substrate, said element isolating layer having an impurity density substantially equal to that of said well and a depth substantially equal to that of said well from the substrate surface.    
     
     
         21 . A semiconductor integrated circuit device as set forth in  claim 18 , wherein said semiconductor substrate has the first conductive type, 
 said first element region is defined, by said element isolating insulator film, in a first conductive type well formed by ion implantation before forming said element isolating insulator film, and    said element isolating layer is formed at the same time that an ion implantation step of forming said first conductive type well is carried out.    
     
     
         22 . A semiconductor integrated circuit device as set forth in  claim 18 , wherein said element isolating insulator film is embedded in a groove formed in said semiconductor substrate.  
     
     
         23 . A semiconductor integrated circuit device as set forth in  claim 18 , wherein a third element region of a second conductive type defined by said element isolating insulator film is formed in said semiconductor substrate, and a transistor of a first conductive channel is formed in said third element region.  
     
     
         24 . A method for producing a semiconductor integrated circuit device, said method comprising the steps of: 
 forming an ion implantation mask having an opening in first, second and fourth predetermined regions of a semiconductor substrate, among the first predetermined region serving to form therein a first element region of a first conductive type, the second predetermined region serving to form therein an element isolating region adjacent to said first element region, a third predetermined region of the first conductive type serving to form therein a second element region having a lower impurity density than that of said first element region, and the fourth predetermined region serving to form therein an element isolating region adjacent to said second element region;    ion-implanting an impurity into said semiconductor substrate via said opening of said ion implantation mask to simultaneously form a first conductive type well in said first element region and said element isolating region adjacent thereto, and an element isolating layer of the first conductive type in said element isolating region adjacent to said second element region;    forming an element isolating insulator film in said element isolating region of said semiconductor substrate; and    forming first and second transistors of a second conductive channel in said first and second element regions, respectively.    
     
     
         25 . A method for producing a semiconductor integrated circuit device as set forth in  claim 24 , wherein said semiconductor substrate has the first conductive type, and said step of forming said first conductive type well and said element isolating layer ion-implants an impurity of the first conductive type more deeply than a bottom of said element isolating insulator film formed thereafter.  
     
     
         26 . A method for producing a semiconductor integrated circuit device, said method comprising: 
 a step of forming a first ion implantation mask having an opening in first, second and fourth predetermined regions of a semiconductor substrate, among the first predetermined region serving to form therein a first element region of a first conductive type, the second predetermined region serving to form therein an element isolating region adjacent to said first element region, a third predetermined region of the first conductive type serving to form therein a second element region having a lower impurity density than that of said first element region, and the fourth predetermined region serving to form therein an element isolating region adjacent to said second element region;    a first ion implantation step of ion-implanting an impurity into said semiconductor substrate via said opening of said first ion implantation mask to simultaneously form a first conductive type well in said first element region and said element isolating region adjacent thereto, and an element isolating layer of the first conductive type in said element isolating region adjacent to said second element region;    a step of forming a second ion implantation mask having an opening in said third predetermined region of said semiconductor substrate;    a second ion implantation step of ion-implanting a first conductive type impurity into said semiconductor substrate via said opening of said second ion implantation mask, at a lower dose than that of said impurity in said first ion implantation step, and more shallowly than said impurity in said first ion implantation step;    a step of forming an element isolating insulator film in said element isolating region of said semiconductor substrate; and    a step of forming first and second transistors of a second conductive channel in said first and second element regions, respectively.    
     
     
         27 . A method for producing a semiconductor integrated circuit device as set forth in  claim 26 , wherein said first ion implantation step ion-implants said impurity of the first conductive type more deeply than a bottom of said element isolating insulator film formed thereafter, and said second ion implantation step is a channel ion implantation for controlling a threshold of said second transistor.  
     
     
         28 . A method for producing a semiconductor integrated circuit device as set forth in  claim 24 , wherein said step of forming said element isolating insulator film has a step of forming a groove in said semiconductor substrate and a step of embedding an element isolating insulator film in said groove.  
     
     
         29 . A method for producing a semiconductor integrated circuit device as set forth in  claim 26 , wherein said step of forming said element isolating insulator film has a step of forming a groove in said semiconductor substrate and a step of embedding an element isolating insulator film in said groove.  
     
     
         30 . A method for producing a semiconductor integrated circuit device as set forth in  claim 24 , which further comprises the steps of: 
 forming an ion implantation mask having an opening in a fifth predetermined region serving to form therein a third element region of a second conductive type and a sixth predetermined region serving to form therein an element isolating region adjacent to said third element region, before forming said element isolating insulator film;    ion-implanting a second conductive type impurity into said semiconductor substrate via said opening of said ion implantation mask to form a second conductive type well in said third element region and said element isolating region adjacent thereto; and    forming a transistor of a first conductive channel in said second conductive type well after forming said element isolating insulator film.    
     
     
         31 . A method for producing a semiconductor integrated circuit device as set forth in  claim 26 , which further comprises the steps of: 
 forming an ion implantation mask having an opening in a fifth predetermined region serving to form therein a third element region of a second conductive type and a sixth predetermined region serving to form therein an element isolating region adjacent to said third element region, before forming said element isolating insulator film;    ion-implanting a second conductive type impurity into said semiconductor substrate via said opening of said ion implantation mask to form a second conductive type well in said third element region and said element isolating region adjacent thereto; and    forming a transistor of a first conductive channel in said second conductive type well after forming said element isolating insulator film.