US2002096750A1PendingUtilityA1
Package for semiconductor chip having thin recess portion and thick plane portion
Priority: Apr 17, 1998Filed: Mar 22, 2002Published: Jul 25, 2002
Est. expiryApr 17, 2018(expired)· nominal 20-yr term from priority
Inventors:Katsunobu Suzuki
H10W 90/756H10W 90/754H10W 90/736H10W 74/00H10W 72/07554H10W 72/07353H10W 72/5522H10W 72/5363H10W 72/931H10W 72/884H10W 72/547H10W 72/536H10W 72/334H10W 90/701H10W 76/47H10W 74/117H10W 70/68H10W 70/027H10W 40/10H10W 70/02H10W 70/60
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Claims
Abstract
In a package for mounting including a metal plate having a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer, the recess portion is thinner than the plane portion.
Claims
exact text as granted — not AI-modified1 . A package comprising a metal plate including a recess portion for mounting a semiconductor chip and a plane potion for mounting a metal pattern layer,
said recess portion being thinner than said plane portion.
2 . The package as set forth in claim 1 , wherein said recess portion has a plurality of protrusions for facing said semiconductor chip.
3 . A method for manufacturing package including a metal plate including a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer, comprising the steps of:
forming a photoresist pattern layer for covering said plane portion of said metal plate; and etching said metal plate by using said photoresist pattern layer as a mask.
4 . The method as set forth in claim 3 , wherein said photoresist pattern layer has a plurality of patterns on said recess portion of said metal plate, so that a plurality of protrusions are formed on said recess portion of said metal plate.
5 . A method for manufacturing a package for mounting including a metal plate including a recess portion for mounting a semiconductor chip and a plane portion for mounting a metal pattern layer, comprising the steps of:
forming an insulating layer on a metal plate; forming a first metal layer on said insulating layer; forming a first photoresist pattern layer on said first metal layer above said plane portion of said metal plate; etching said first metal layer by using said first photoresist pattern layer as a mask; removing said first photoresist pattern layer after said first metal layer is etched; etching said insulating layer by using said first metal layer as a mask after said first photoresist pattern layer is removed; forming a second metal layer on said metal plate and said first metal layer after said insulating layer is etched; and forming a second photoresist pattern layer on said second metal layer above said plane portion of said metal plate; etching said second metal layer and said recess portion of said metal plate by using said second photoresist pattern.
6 . The method as set forth in claim 5 , wherein said second photoresist pattern layer has a plurality of patterns on said recess portion of said metal layer.
7 . The method as set forth in claim 5 , wherein said first photoresist pattern layer has a throughhole on said plane portion of said metal plate.
8 . The method as set forth in claim 5 , wherein said second metal layer forming step forms said second metal layer by using a plating process.Join the waitlist — get patent alerts
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