Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate

Abstract

High quality epitaxial layers of GaN can be grown overlying large silicon wafers ( 200 ) by forming an amorphous layer ( 210 ) on the substrate. The amorphous layer dissipates strain and permits the growth of a high quality GaN layer ( 208 ). Any lattice mismatch between the GaN layer and the underlying substrate is taken care of by the amorphous layer.

We claim:  
     
         1 . A semiconductor structure comprising: 
 a monocrystalline substrate;    an amorphous layer formed on the substrate; and    a first monocrystalline nitride material layer overlying the amorphous layer and formed of at least one from the group comprising GaN, GaInN, AlGaN, SiN and AlN.    
     
     
         2 . The semiconductor structure of  claim 1 , wherein the amorphous layer comprises an oxide formed as a monocrystalline oxide and subsequently heat treated to convert the monocrystalline oxide to an amorphous oxide.  
     
     
         3 . The semiconductor structure of  claim 1 , wherein the first monocrystalline nitride material layer is formed by nitridation of a first monocrystalline material layer selected from the group comprising GaAs, GaInAs, AlGaAs, Si and AlAs.  
     
     
         4 . The semiconductor structure of  claim 1 , wherein the substrate comprises silicon. The semiconductor structure of  claim 2 , wherein the monocrystalline oxide is formed of material selected from the group comprising Sr z Ba 1-z TiO 3 , Sr z Ba 1-z ZrO 3 , Sr z Ba 1-z HfO 3 , Sr z Ba 1-z SnO 3  and CaTiO 3 , where z ranges from 0 to approximately 1.  
     
     
         5 . The semiconductor structure of  claim 1 , further comprising a monocrystalline material layer formed overlying the amorphous layer and underlying the first monocrystalline nitride material layer.  
     
     
         6 . The semiconductor structure of  claim 1 , further comprising a template layer positioned between the amorphous layer and the monocrystalline nitride material layer.  
     
     
         7 . The semiconductor structure of  claim 7 , wherein the template layer is formed of material selected from the group comprising Ti-As, Sr-O-As, Sr-Ga-O, Ti-O-As, or Sr-Al-O.  
     
     
         8 . The semiconductor structure of  claim 7 , wherein the template layer comprises a Zint1-type phase material.  
     
     
         9 . The semiconductor structure of  claim 9 , wherein the Zint1-type phase material comprises at least one of SrAl 2 , SrAl 4 , (MgCaYb)Ga 2 , (Ca, Sr, Eu, Yb)In 2 , BaGe 2 As, and SrSn 2 As 2 .  
     
     
         10 . The semiconductor structure of  claim 7 , wherein the template layer comprises a surfactant material.  
     
     
         11 . The semiconductor structure of  claim 11 , wherein the surfactant material comprises at least one of Al, In, and Ga.  
     
     
         12 . The semiconductor structure of  claim 11 , wherein the template layer further comprises a capping layer.  
     
     
         13 . The semiconductor structure of  claim 13 , wherein the capping layer is formed by exposing the surfactant material to a cap-inducing material.  
     
     
         14 . The semiconductor structure of  claim 14 , wherein the cap-inducing material comprises at least one of As, P, Sb, and N.  
     
     
         15 . The semiconductor structure of  claim 13 , wherein the surfactant comprises Al, and the capping layer comprises Al 2 Sr.  
     
     
         16 . The semiconductor structure of  claim 3 , wherein said first monocrystalline material layer has a thickness in the range of from about 20 angstroms to about 50 angstroms.  
     
     
         17 . A process for fabricating a semiconductor structure comprising: 
 providing a monocrystalline substrate;    epitaxially growing an accommodating buffer layer overlying the substrate;    epitaxially growing a first monocrystalline material layer overlying the accommodating buffer layer;    nitriding at least a portion of the first monocrystalline material layer to form a first monocrystalline nitride material layer; and    heat treating the structure to convert the accommodating buffer layer to an amorphous layer.    
     
     
         18 . The process of  claim 18 , further comprising forming a second monocrystalline nitride material layer overlying the first monocrystalline nitride material layer.  
     
     
         19 . The process of  claim 18 , further comprising forming an amorphous oxide layer underlying the accommodating buffer layer during epitaxially growing the accommodating buffer layer.  
     
     
         20 . The process of  claim 18 , wherein providing a monocrystalline substrate comprises providing a substrate formed of silicon.  
     
     
         21 . The process of  claim 18 , further comprising epitaxially growing a second monocrystalline material layer overlying the accommodating buffer layer and underlying the first monocrystalline material layer.  
     
     
         22 . The process of  claim 18 , wherein epitaxially growing a first monocrystalline material layer comprises epitaxially growing a first monocrystalline material layer selected from the group comprising GaAs, GaInAs, AlGaAs, Si and AlAs.  
     
     
         23 . The process of  claim 18 , wherein epitaxially growing an accommodating buffer layer comprises epitaxially growing an accommodating buffer layer selected from the group comprising Sr z Ba 1-z TiO 3 , Sr z Ba 1-z ZrO 3 , Sr z Ba 1-z HfO 3 , Sr z Ba 1-z SnO 3 , and CaTiO 3 , where z ranges from 0 to approximately 1.  
     
     
         24 . The process of  claim 18 , wherein each of the steps of epitaxially growing comprises epitaxially growing by a process selected from the group consisting of MBE, MOCVD, MEE, CVD, PVD, PLD, CSD and ALE.  
     
     
         25 . The process of  claim 18 , wherein nitriding comprises nitriding by a process selected from the group comprising RF plasma processing, ECR plasma processing, or Eximer laser processing.  
     
     
         26 . The process of  claim 18 , wherein heat treating comprises subjecting the structure to a temperature in the range of from about 700 degrees Celsius to about 900 degrees Celsius.  
     
     
         27 . The process of  claim 18 , further comprising forming a template layer positioned between the accommodating buffer layer and the first monocrystalline material layer.  
     
     
         28 . The process of  claim 18 , wherein the nitriding comprises nitriding to form a first monocrystalline nitride material layer formed of material selected from the group comprising GaN, GaInN, AlGaN, SiN and AlN.  
     
     
         29 . The process of  claim 18 , wherein epitaxially growing a first monocrystalline material layer comprises epitaxially growing a first monocrystalline material layer having a thickness in the range of from about 20 angstroms to about 50 angstroms.  
     
     
         30 . A semiconductor structure fabricated from a process comprising: 
 providing a monocrystalline substrate;    epitaxially growing an accommodating buffer layer overlying the substrate;    epitaxially growing a first monocrystalline material layer overlying the accommodating buffer layer;    nitriding at least a portion of the first monocrystalline material layer to form a first monocrystalline nitride material layer; and    heat treating the structure to convert the accommodating buffer layer to an amorphous layer.    
     
     
         31 . The semiconductor structure of  claim 31 , wherein the process further comprises forming a second monocrystalline nitride material layer overlying the first monocrystalline nitride material layer.  
     
     
         32 . The semiconductor structure of  claim 31 , wherein the process further comprises forming an amorphous oxide layer underlying the accommodating buffer layer during epitaxially growing the accommodating buffer layer.  
     
     
         33 . The semiconductor structure of  claim 31 , wherein providing a monocrystalline substrate comprises providing a substrate formed of silicon.  
     
     
         34 . The semiconductor structure of  claim 31 , wherein the process further comprises epitaxially growing a second monocrystalline material layer overlying the accommodating buffer layer and underlying the first monocrystalline material layer.  
     
     
         35 . The semiconductor structure of  claim 31 , wherein epitaxially growing a first monocrystalline material layer comprises epitaxially growing a first monocrystalline material layer selected from the group comprising GaAs, GaInAs, AlGaAs, Si and AlAs.  
     
     
         36 . The semiconductor structure of  claim 31 , wherein epitaxially growing an accommodating buffer layer comprises epitaxially growing an accommodating buffer layer selected from the group comprising Sr z Ba 1-z TiO 3 , Sr z Ba 1-z ZrO 3 , Sr z Ba 1-z HfO 3 , Sr z Ba 1-z SnO 3  and CaTiO 3 , where z ranges from 0 to approximately 1.  
     
     
         37 . The semiconductor structure of  claim 31 , wherein each of the steps of epitaxially growing comprises epitaxially growing by a process selected from the group consisting of MBE, MOCVD, MEE, CVD, PVD, PLD, CSD and ALE.  
     
     
         38 . The semiconductor structure of  claim 31 , wherein nitriding comprises nitriding by a process selected from the group comprising RF plasma processing, ECR plasma processing, or Eximer laser processing.  
     
     
         39 . The semiconductor structure of  claim 31 , wherein heat treating comprises subjecting the structure to a temperature in the range of from about 700 degrees Celsius to about 900 degrees Celsius.  
     
     
         40 . The semiconductor structure of  claim 31 , wherein the process further comprises forming a template layer positioned between the accommodating buffer layer and the first monocrystalline material layer.  
     
     
         41 . The semiconductor structure of  claim 31 , wherein the nitriding comprises nitriding to form a first monocrystalline nitride material layer formed of material selected from the group comprising GaN, GaInN, AlGaN, SiN and AlN.  
     
     
         42 . The semiconductor structure of  claim 31 , wherein epitaxially growing a first monocrystalline material layer comprises epitaxially growing a first monocrystalline material layer having a thickness in the range of from about 10 angstroms to about 100 angstroms.