Thin layer structure made up of conductive and insulative zones

Abstract

A structure comprising a thin layer ( 2 ) that can be integral with a support ( 3 ), the thin layer being a layer of a semiconductor material made insulating by ion implantation except for at least one zone that permits a vertical electrical connection through the entire thickness of the thin layer ( 2 ). A method of manufacturing such a structure is also disclosed.

1 . Method of manufacturing a thin layer ( 2 ), the thin layer ( 2 ) having to provide at least one vertical electrical connection through its entire thickness, the thin layer ( 2 ) being made of a conductive or semiconductive material capable of having its electrical properties disrupted when it is subjected to an ion implantation using specified species, the method comprising the following steps 
 masking one face ( 5 ) of a substrate ( 1 ) comprising said material by masking means ( 4 ) that define at least one masked area, the size of which does not exceed a limiting dimension specified for said material, this limiting dimension having to allow cleavage of the substrate ( 1 ) at the time of the subsequent cleavage step    ion implantation of the substrate ( 1 ) through its masked face by means of said species, the implantation being capable of creating, within the non-masked volume of the substrate ( 1 ) and at a depth close to the mean depth of penetration of the species, a layer of micro-cavities ( 6 ) demarcating said thin layer ( 2 )    possible removal of the masking means ( 4 )    cleavage of the substrate ( 1 ) at the level of the layer of micro-cavities ( 6 ) in order to obtain said thin layer.    
     
     
         2 . Method according to  claim 1 , characterized in that the implanted face ( 5 ) of the substrate ( 1 ) is made integral with a support ( 3 ) before the cleavage step.  
     
     
         3 . Method according to  claim 1 , characterized in that the thin layer is made integral with a support after the cleavage step.  
     
     
         4 . Method according to any one of  claims 1  to  3 , characterized in that the masking means ( 4 ) comprise deposits of a material capable of preventing penetration of the ions into the substrate during the ion implantation, these deposits ( 4 ) being deposited on said face ( 5 ) of the substrate ( 1 ).  
     
     
         5 . Method according to  claim 1 , characterized in that the masking means comprise micro-elements deposited on said face of the substrate.  
     
     
         6 . Method according to  claim 5 , characterized in that said micro-elements are chosen from among micro-beads and particles.  
     
     
         7 . Method according to any one of  claims 1  to  6 , characterized in that the masking is carried out in such a way that the thin layer ( 2 ) overall preserves the electrical properties of the substrate ( 1 ).  
     
     
         8 . Method according to any one of  claims 1  to  6 , characterized in that the masking is carried out in such a way that the thin layer ( 2 ) overall behaves like an insulating layer except for at least one part formed from one zone or from several neighboring zones preserving the electrical properties of the substrate ( 1 ).  
     
     
         9 . Method according to  claim 8 , characterized in that the part formed from this zone or from several neighboring zones preserving the electrical properties of the substrate ( 1 ) constitutes a conductive path or a conductive track.  
     
     
         10 . Method according to  claim 2 , characterized in that the step of integrating the substrate with the support is carried out by a method chosen between bonding by molecular adhesion and bonding by means of a brazing material.  
     
     
         11 . Method according to  claim 10 , characterized in that said brazing material is based on indium.  
     
     
         12 . Method according to  claim 2 , characterized in that it includes, before the integration step, a step of preparing a conductive interface between said face ( 5 ) of the substrate ( 1 ) and said support ( 3 ).  
     
     
         13 . Method according to  claim 12 , characterized in that the step of preparing a conductive interface comprises the deposition of a metal layer onto said face ( 5 ) of the substrate ( 1 ) and/or onto the support ( 3 ).  
     
     
         14 . Method according to  claim 13 , characterized in that the said metal layer is a layer of palladium.  
     
     
         15 . Method according to one of claims  13  or  14 , characterized in that said interface metal layer is associated with the deposition of conductive metal bonding materials.  
     
     
         16 . Method according to  claim 15 , characterized in that the conductive bonding materials are successive deposits of titanium, nickel and gold.  
     
     
         17 . Method according to any one of  claims 13  to  16 , characterized in that a heat treatment is carried out in a way that causes diffusion of the deposited metal layer.  
     
     
         18 . Application of the method according to any one of  claims 1  to  17  to the manufacture of a structure comprising a thin layer of SiC, GaAs or InP on a support, the ion implantation being carried out using hydrogen and/or helium ions.  
     
     
         19 . Application according to  claim 18 , characterized in that the support is made of silicon.  
     
     
         20 . Structure comprising a thin layer ( 2 ), the thin layer ( 2 ) being a layer of conductive or semiconductive material made insulating by ion implantation except for at least one zone ( 9 ) that allows a vertical electrical connection through the entire thickness of the thin layer ( 2 ).  
     
     
         21 . Structure according to  claim 20 , characterized in that the thin layer comprises a multitude of zones, these zones being distributed over the entire surface of the thin layer.  
     
     
         22 . Structure according to  claim 20 , characterized in that the thin layer comprises one zone or a plurality of zones concentrated to constitute at least one conductive path or at least one conductive track.  
     
     
         23 . Structure according to any one of  claims 20  to  22 , characterized in that the thin layer ( 2 ) is made integral with a support ( 3 ) through an intermediate conductive interface.  
     
     
         24 . Structure according to  claim 23 , characterized in that the conductive interface is constituted by a metal layer.  
     
     
         25 . Structure according to  claim 24 , characterized in that the metal layer is a layer of palladium.  
     
     
         26 . Structure according to any one of  claims 23  to  25 , characterized in that deposition of conductive bonding materials is associated with said metal interface layer.  
     
     
         27 . Structure according to  claim 26 , characterized in that the conductive bonding materials are successive deposits of titanium, nickel and gold.  
     
     
         28 . Structure according to any one of  claims 20  to  22 , characterized in that the thin layer ( 2 ) is made integral with a support ( 3 ) through the use of a brazing material.  
     
     
         29 . Structure according to  claim 28 , characterized in that the brazing material is based on indium.  
     
     
         30 . Structure according to any one of  claims 20  to  29 , characterized in that the material of the thin layer ( 2 ) is chosen from among SiC, GaAs and InP.  
     
     
         31 . Structure according to any one of  claims 23  to  29 , characterized in that the support ( 3 ) is made of silicon.