Semiconductor device allowing electrical writing and erasing of information and method of manufacturing the same

Abstract

In a semiconductor device and a method of manufacturing the same, two floating gate electrodes are independently controlled with one control gate electrode. In the semiconductor device, the first floating gate electrode is formed on a channel region with a first gate insulating film therebetween, and the control gate electrode is formed on the first floating gate electrode with a first interlayer insulating film therebetween. The second floating gate electrode exists on the control gate electrode and has a portion extended above a semiconductor substrate and overlapping with a second impurity diffusion layer. A first impurity diffusion layer overlaps with an end of the first floating gate electrode. Thereby, writing, erasing and reading are effected on the two, i.e., first and second floating gate electrodes with one control gate electrode while maintaining the substantially same memory cell area as the prior art.

What is claimed is:  
     
         1 . A semiconductor device comprising: 
 a semiconductor substrate of a first conductivity type having a main surface;    first and second impurity regions of a second conductivity type formed on the main surface of said semiconductor substrate with a predetermined space defining a channel region between each other;    a first floating gate electrode formed on said channel region with a first gate insulating film therebetween and having an end overlapping with said first impurity region;    a control gate electrode formed on an upper surface of said first floating gate electrode with a first interlayer insulating film therebetween; and    a second floating gate electrode formed on an upper surface and a side surface of said control gate electrode with a second interlayer insulating film therebetween and formed on said channel region with a second gate insulating film therebetween to have an end overlapping with said second impurity region.    
     
     
         2 . The semiconductor device according to  claim 1 , wherein said second floating gate electrode has a portion extending over said first impurity region with said second gate insulating film therebetween.  
     
     
         3 . The semiconductor device according to  claim 1 , wherein said second floating gate electrode has the other end located above a region for forming said control gate electrode.  
     
     
         4 . The semiconductor device according to  claim 1 , wherein a side surface of said first floating gate electrode and a side surface of said control gate electrode are substantially linearly aligned to each other.  
     
     
         5 . A semiconductor device allowing electrical writing and erasing of information comprising: 
 a semiconductor substrate of a first conductivity type having a main surface;    first and second impurity regions of a second conductivity type formed on the main surface of said semiconductor substrate with a predetermined space defining a channel region between each other;    a first floating gate electrode formed on said channel region with a first gate insulating film therebetween and having an end overlapping with said first impurity region;    a second floating gate electrode formed on an upper surface and a side surface of said first floating gate electrode with a first interlayer insulating film therebetween and formed on said channel region with a second gate insulating film therebetween to have an end overlapping with said second impurity region; and    a control gate electrode formed on the upper surface of said first floating gate electrode with said first interlayer insulating film therebetween and formed on a side surface and an upper surface of said second floating gate electrode with a second interlayer insulating film therebetween.    
     
     
         6 . The semiconductor device according to  claim 5 , wherein 
 said second floating gate electrode has the other end located above a region for forming said first floating gate electrode,    an end of said control gate electrode has a side surface substantially linearly aligned to a side surface of an end of said first floating gate electrode, and    the other end of said control gate electrode has a side surface substantially linearly aligned to a side surface of the other end of said second floating gate electrode.    
     
     
         7 . A semiconductor device allowing electrical writing and erasing of information comprising: 
 a semiconductor substrate of a first conductivity type having a main surface;    first and second impurity regions of a second conductivity type formed on the main surface of said semiconductor substrate with a predetermined space defining a channel region between each other;    a first floating gate electrode formed on said channel region with a first gate insulating film therebetween and having an end overlapping with said first impurity region;    a second floating gate electrode formed on said channel region with a first gate insulating film therebetween to form a predetermined space with respect to said first floating gate electrode and having an end overlapping with said second impurity region; and    a control gate electrode formed on upper surfaces and side surfaces of said first and second floating gate electrodes with a first interlayer insulating film therebetween and formed on said channel region with a second gate insulating film therebetween.    
     
     
         8 . A semiconductor device according to  claim 7 , wherein 
 said channel region is provided at its region located between said first floating gate electrode and said second floating gate electrode with a third impurity region.    
     
     
         9 . The semiconductor device according to  claim 7 , wherein 
 an end of said control gate electrode has a side surface substantially linearly aligned to a side surface of an end of said first floating gate electrode, and    the other end of said control gate electrode has a side surface substantially linearly aligned to a side surface of the other end of said second floating gate electrode.    
     
     
         10 . A method of manufacturing a semiconductor device comprising the steps of: 
 forming a first gate insulating film on a main surface of a semiconductor substrate of a first conductivity type;    forming a first floating gate electrode on said first gate insulating film;    forming a control gate electrode on said first floating gate electrode with a first interlayer insulating film therebetween;    introducing impurity into said semiconductor substrate using said first floating gate electrode as a mask to form a first impurity region of a second conductivity type having a region overlapping with an end of said first floating gate electrode;    forming a second interlayer insulating film on an upper surface and a side surface of said control gate electrode and a side surface of said first floating gate electrode;    forming a second gate insulating film on the main surface of said semiconductor substrate;    forming a second floating gate electrode on said second interlayer insulating film and said second gate insulating film to have a portion located on said control gate electrode and at least an end extended to a position on said semiconductor substrate near the other end of said first floating gate electrode; and    introducing impurity into said semiconductor substrate using said second floating gate electrode as a mask to form a second impurity region of the second conductivity type having a region overlapping with an end of said second floating gate electrode.    
     
     
         11 . The method of manufacturing the semiconductor device according to  claim 10 , wherein said first and second impurity regions are formed at the same step after formation of said second floating gate electrode.  
     
     
         12 . The method of manufacturing the semiconductor device according to  claim 10 , wherein said second interlayer insulating film and said second gate insulating film are formed at the same step.  
     
     
         13 . A method of manufacturing a semiconductor device comprising the steps of: 
 forming a first gate insulating film on a main surface of a semiconductor substrate of a first conductivity type;    forming a first floating gate electrode on said first gate insulating film;    forming a first interlayer insulating film on an upper surface and a side surface of said first floating gate electrode;    forming a second gate insulating film on the main surface of said semiconductor substrate;    forming a second floating gate electrode on said first interlayer insulating film and said second gate insulating film to have a portion located above said first floating gate electrode and at least an end extended to a position on said semiconductor substrate near one end of said first floating gate electrode;    forming a second interlayer insulating film at least on an upper surface of said second floating gate electrode;    forming a control gate electrode on upper surfaces of said first and second floating gate electrodes with said first and second interlayer insulating films therebetween, respectively; and    introducing impurity into said semiconductor substrate using said control gate electrode as a mask to form a first impurity region of a second conductivity type having a region overlapping with the other end of said first floating gate electrode and a second impurity region of the second conductivity type having a region overlapping with an end of said second floating gate electrode.    
     
     
         14 . The method of manufacturing the semiconductor device according to  claim 13 , wherein said first interlayer insulating film and said second gate insulating film are formed at the same step.  
     
     
         15 . A method of manufacturing a semiconductor device comprising the steps of: 
 forming a gate insulating film on a main surface of a semiconductor substrate of a first conductivity type;    forming first and second floating gate electrodes on said gate insulating film with a predetermined space between each other by forming a floating gate electrode layer on said gate insulating film and subsequently patterning said floating gate electrode layer;    forming an interlayer insulating film on upper surfaces and side surfaces of said first and second floating gate electrodes;    forming a second gate insulating film on a surface of said semiconductor substrate located between said first and second floating gate electrodes;    forming a control gate electrode on surfaces of said interlayer insulating film and said second gate insulating film;    introducing impurity into said semiconductor substrate with an end of said first floating gate electrode as a mask to form a first impurity region of a second conductivity type having a region overlapping with said one end of said first floating gate electrode; and    introducing impurity into said semiconductor substrate using an end of said second floating gate electrode as a mask to form a second impurity region of the second conductivity type having a region overlapping with said one end of said second floating gate electrode.    
     
     
         16 . The method of manufacturing the semiconductor device according to  claim 15 , wherein said interlayer insulating film and said second gate insulating film are formed at the same step.