Diffusion barriers comprising a self-assembled monolayer
Abstract
The present invention provides a method for forming a diffusion barrier layer, a diffusion barrier in an integrated circuit and an integrated circuit. The method for forming a diffusion barrier involves the following steps: 1) preparing a silicon substrate; 2) contacting the silicon substrate with a composition comprising self-assembled monolayer subunits and a solvent; and, 3) removing the solvent. The diffusion barrier layer includes a self-assembled monolayer. The integrated circuit includes a silicon substrate, a diffusion barrier layer and a metal deposited on the diffusion barrier layer. The diffusion barrier layer in the integrated circuit is covalently attached to the silicon substrate and includes a self-assembled monolayer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for forming a diffusion barrier layer comprising the steps of:
a) preparing a silicon substrate; b) contacting the silicon substrate with a composition comprising self-assembled monolayer subunits and a solvent; and, c) removing the solvent thereby forming the diffusion barrier.
2 . The method according to claim 1 , wherein the self-assembled monolayer subunit is of the following structure:
wherein Y is an O-alkyl group, and wherein R 2 is an alkyl group, heteroalkyl group, aryl group or heteroaryl group.
3 . The method according to claim 1 , wherein the self-assembled monolayer subunit is of the following structure:
wherein Y is a halogen, and wherein R 2 is an alkyl group, heteroalkyl group, aryl group or heteroaryl group.
4 . The method according to claim 1 , wherein the silicon substrate preparation comprises the formation of a silicon oxide surface.
5 . The method according to claim 1 , wherein the method further comprises the step of heating the silicon substrate and the composition during contact.
6 . The method according to claim 2 , wherein R 2 is an alkyl group of the following structure:
wherein R 3 , R 4 and R 5 are independently selected from the group consisting of hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH 2 , NHR 6 , NR 6 R 7 , OH, OR 6 , SH, SR 6 , CHO, COOH and CN, and wherein R 6 and R 7 are alkyl groups, and wherein n is an integer ranging from 1 to 5.
7 . The method according to claim 2 , wherein R 2 is an alkyl group of the following structure:
wherein R 3 and R 4 are independently selected from the group consisting of hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH 2 , NHR 6 , NR 6 R 7 , OH, OR 6 , SH, SR 6 , CHO, COOH and CN, and wherein R 6 and R 7 are alkyl groups, and wherein n is an integer ranging from 1 to 5.
8 . The method according to claim 6 , wherein Y is OCH 3 .
9 . The method according to claim 7 , wherein Y is OCH 3 .
10 . The method according to claim 8 , wherein R 3 , R 4 and R 5 are hydrogen and n is 2.
11 . The method according to claim 9 , wherein R 2 is an alkyl group of the following structure:
and wherein R 3 and R 4 are hydrogen and n is 2.
12 . A diffusion barrier layer in an integrated circuit, wherein the diffusion barrier comprises a self-assembled monolayer.
13 . The diffusion barrier according to claim 12 , wherein the self-assembled monolayer comprises subunits, and wherein the subunits are of the following structure:
wherein R 2 is an alkyl group, heteroalkyl group, aryl group or heteroaryl group.
14 . The diffusion barrier according to claim 13 , wherein R 2 is an alkyl group of the following structure:
wherein R 3 , R 4 and R 5 are independently selected from the group consisting of hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH 2 , NHR 6 , NR 6 R 7 , OH, OR 6 , SH, SR 6 , CHO, COOH and CN, and wherein R 6 and R 7 are alkyl groups, and wherein n is an integer ranging from 1 to 5.
15 . The diffusion barrier according to claim 13 , wherein R 2 is an alkyl group of the following structure:
wherein R 3 and R 4 are independently selected from the group consisting of hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH 2 , NHR 6 , NR 6 R 7 , OH, OR 6 , SH, SR 6 , CHO, COOH and CN, and wherein R 6 and R 7 are alkyl groups, and wherein n is an integer ranging from 1 to 5.
16 . The diffusion barrier according to claim 14 , wherein R 3 , R 4 and R 5 are hydrogen and n is 2.
17 . The diffusion barrier according to claim 15 , wherein R 2 is an alkyl group of the following structure:
and wherein R 3 and R 4 are hydrogen and n is 2.
18 . An integrated circuit comprising a silicon substrate, a diffusion barrier layer and a metal deposited on the diffusion barrier layer, wherein the diffusion barrier is covalently attached to the silicon substrate, and wherein the diffusion barrier is a self-assembled monolayer.
19 . The integrated circuit according to claim 18 , wherein the self-assembled monolayer comprises subunits of the following structure:
wherein R 2 is an alkyl group, heteroalkyl group, aryl group or heteroaryl group.
20 . The integrated circuit according to claim 19 , wherein R 2 is an alkyl group of the following structure:
wherein R 3 , R 4 and R 5 are independently selected from the group consisting of hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH 2 , NHR 6 , NR 6 R 7 , OH, OR 6 , SH, SR 6 , CHO, COOH and CN, and wherein R 6 and R 7 are alkyl groups, and wherein n is an integer ranging from 1 to 5.
21 . The integrated circuit according to claim 19 , wherein R 2 is an alkyl group of the following structure:
wherein R 3 and R 4 are independently selected from the group consisting of hydrogen, alkyl groups, heteroalkyl groups, halo groups, NH 2 , NHR 6 , NR 6 R 7 , OH, OR 6 , SH, SR 6 , CHO, COOH and CN, and wherein R 6 and R 7 are alkyl groups, and wherein n is an integer ranging from 1 to 5.
22 . The integrated circuit according to claim 20 , wherein R 3 , R 4 and R 5 are hydrogen and n is 2.
23 . The integrated circuit according to claim 21 , wherein R 2 is an alkyl group of the following structure:
and wherein R 4 are hydrogen and n is 2.Join the waitlist — get patent alerts
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