Thin film device provided with coating film, liquid crystal panel and electronic device, and method for making the thin film device
Abstract
Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater ( 102 ), a coating solution containing a thin film component which is supplied from a solution storage section ( 105 ) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section ( 103 ) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
Claims
exact text as granted — not AI-modified1 . A thin film device having a thin film monolithic structure comprising a plurality of thin films including at least one insulating layer and at least one conductive layer, wherein
at least one of said thin films in said thin film monolithic structure is formed of a coating film (excluding a spin-on-glass film having a basic structure comprising siloxane bonds), which is obtained by applying a solution containing a constituent of said thin film followed by annealing.
2 . A thin film device according to claim 1 , wherein said thin film monolithic structure comprises a semiconductor layer.
3 . A thin film device according to claim 2 , wherein said thin film monolithic structure comprises a thin film transistor comprising: a silicon semiconductor layer including a source region, a drain region and a channel region therebetween; a gate insulating layer; and a gate electrode.
4 . A thin film device according to claim 3 , wherein said thin film monolithic structure further comprises an insulating underlayer formed under said thin film transistor.
5 . A thin film device according to either claim 3 or 4 , wherein said thin film monolithic structure further comprises:
a source electrode connected to said source region,
a drain electrode connected to said drain region, and
at least one interlevel insulating film which insulates said gate electrode, said source electrode and said drain electrode.
6 . A thin film device according to any one of claims 3 to 5 , wherein said thin film monolithic structure further comprises a protective insulating layer on said thin film transistor.
7 . A thin film device according to any one of claims 3 to 6 , wherein all of said insulating layers included in said thin film monolithic structure are formed of said coating film.
8 . A thin film device according to any one of claims 4 to 6 , wherein all of said insulating layers other than said gate insulating layer are formed of said coating film.
9 . A thin film device according to any one of claims 1 to 6 , wherein at least two of said thin films included in said thin film monolithic structure are formed of said coating film.
10 . A thin film device according to any one of claims 1 to 9 , wherein said at least one insulating layer is formed of a SiO 2 coating film which is obtained by applying a solution containing a polymer having Si—N bonds and performing a first annealing process in an oxygen atmosphere.
11 . A thin film device according to claim 10 , wherein said at least one insulating layer is subjected to a second annealing process after said first annealing process at a temperature higher than that in said first annealing process, so that an interface is further cleaned compared to that after said first annealing process.
12 . A thin film device according to any one of claims 2 to 9 , wherein said semiconductor layer comprises a silicon coating film which is obtained by applying a solution containing silicon particles and performing a first annealing process and includes an impurity.
13 . A thin film device according to claim 12 , wherein said semiconductor layer is subjected to a second annealing process after said first annealing process at a temperature higher than that in said first annealing process, so that the crystallinity is improved compared to that after said first annealing process.
14 . A thin film device according to any one of claims 1 to 9 , wherein said at least one conductive layer is formed of a conductive coating film obtained by applying a solution containing conductive particles and performing a first annealing process.
15 . A thin film device according to claim 14 , wherein said at least one conductive layer is subjected to a second annealing process after said first annealing process at a temperature higher than that in said first annealing process, so that the resistance is reduced compared to that after said first annealing process.
16 . A thin film device according to claim 14 , wherein said conductive coating film is an ITO coating film.
17 . A thin film device according to claim 16 , wherein a surface of said ITO coating film is metal-plated.
18 . A thin film device according to any one of claims 13 to 17 , wherein said at least one conductive layer further comprises a conductive sputtering film formed on a contact face of said conductive layer by a sputtering process.
19 . A thin film device according to claim 1 , wherein said thin film monolithic structure further comprises a plurality of pixel switching elements arranged at corresponding pixels formed near intersections of a plurality of data lines with a plurality of scanning lines, and pixel electrodes connected thereto.
20 . A thin film device according to claim 19 , wherein each of said pixel switching elements is a thin film transistor.
21 . A thin film device according to claim 20 , wherein said thin film transistor comprises:
a source region electrically connected to one of said data lines, a gate electrode electrically connected to one of said scanning lines, and a drain electrode electrically connected to one of said pixel electrodes, wherein said pixel electrode is formed of a conductive coating film.
22 . A thin film device according to claim 21 , wherein said conductive coating film is an ITO coating film.
23 . A thin film device according to either claim 21 or 22 , wherein said thin film transistor further comprises an interlevel insulating film formed on the top face of said gate electrode, and said data line and said pixel electrode are electrically connected to said source region and said drain region, respectively, through respective contact holes formed in said interlevel insulating film.
24 . A thin film device according to claim 23 , wherein said interlevel insulating film comprises a lower interlevel insulating film lying at the lower side and an upper interlevel insulating film formed on said lower interlevel insulating film,
each of said data lines is electrically connected to said source region through a first contact hole formed in said lower interlevel insulating film, each of said pixel electrodes is electrically connected to said drain region through a second contact hole formed in said lower interlevel insulating film and said upper interlevel insulating film, and the periphery of said pixel electrode lies above said data lines and said scanning lines.
25 . A thin film device according to either claim 23 or 24 , wherein each of said pixel electrodes formed of said conductive coating film is electrically connected to said drain electrode through a conductive sputtering film.
26 . A thin film device according to claim 25 , wherein said conductive sputtering film is an ITO sputtering film.
27 . A thin film device according to either claim 25 or 26 , wherein said conductive coating film and said conductive sputtering film have a common pattern.
28 . A thin film device according to either claim 25 or 26 , wherein the periphery of said conductive coating film lies outside the periphery of said conductive sputtering film.
29 . A thin film device according to either claim 25 or 26 , wherein said conductive sputtering film and said data lines lie in a common layer and are formed of a common metallic material.
30 . A thin film device according to either claim 25 or 28 , wherein said conductive sputtering film lies above said data lines.
31 . A thin film device according to claim 23 , wherein said interlevel insulating film comprises a lower interlevel insulating film lying at the lower side and an upper interlevel insulating film formed on said lower interlevel insulating film, a conductive sputtering film formed on said upper interlevel insulating film, said conductive sputtering film and said data lines lying in the same layer,
each of said data lines is electrically connected to said source region through a first contact hole formed in said lower interlevel insulating film, said conductive sputtering film is electrically connected to said drain region through a second contact hole formed in said upper interlevel insulating film and said lower interlevel insulating film, and said conductive coating film is deposited on said conductive sputtering film.
32 . A thin film device according to claim 23 , wherein said interlevel insulating film comprises a lower interlevel insulating film lying at the lower side and an upper interlevel insulating film formed on said lower interlevel insulating film, a conductive sputtering film formed on said lower interlevel insulating film, said conductive sputtering film and said data lines lying in the same layer,
each of said data lines is electrically connected to said source region through a first contact hole formed in said lower interlevel insulating film, said conductive sputtering film is electrically connected to said drain region through a second contact hole formed in said lower interlevel insulating film, and said conductive coating film is deposited on said upper interlevel insulating film and electrically connected to said conductive sputtering film through a third contact hole formed in said upper interlevel insulating film.
33 . A liquid crystal panel comprising:
an active matrix substrate provided with a thin film device described in any one of claims 19 to 32 , a counter substrate facing said active matrix substrate, and a liquid crystal layer encapsulated between said active matrix substrate and said counter substrate.
34 . An electronic device comprising the liquid crystal panel described in claim 34 .
35 . A method for making a thin film device having a thin film monolithic structure comprising a plurality of thin films including at least one insulating layer and at least one conductive layer;
the manufacturing steps of at least one of said thin films in said thin film monolithic structure comprising:
a step for applying a coating solution containing a constituent of said thin film onto a substrate; and
a step for forming a coating film (excluding a spin-on-glass film having a basic structure comprising siloxane bonds) by annealing the coated surface on said substrate.
36 . A method for making a thin film device according to claim 35 , wherein the manufacturing steps of said at least one insulating layer comprises:
a first step applying a coating solution containing a polymer having Si-N bonds onto said substrate, and a second step applying a first annealing process to the coated surface in an oxygen atmosphere to form a SiO 2 insulating coating film; and wherein said at least one insulating layer is formed of said insulating coating film.
37 . A method for making a thin film device according to claim 36 , wherein said manufacturing steps further comprises a third step of applying a second annealing process to said substrate after said second step at a temperature higher than that in said first annealing process, so that the interface of said at least one insulating layer is further cleaned compared to that after said first annealing process.
38 . A method for making a thin film device according to claim 37 , wherein said second annealing process is performed by laser annealing or lamp annealing.
39 . A method for making a thin film device according to claim 35 , wherein said thin film monolithic structure further comprises a silicon semiconductor layer; and
the manufacturing steps of said silicon semiconductor layer comprises:
a first step applying a coating solution containing silicon particles onto said substrate,
a second step applying a first annealing process onto the coated surface to form a silicon coating film, and
a third step forming said silicon semiconductor layer by implanting an impurity into said silicon coating film.
40 . A method for making a thin film device according to claim 39 , wherein a second annealing process at a temperature higher than that in said first annealing process is performed after said second annealing process so as to improve the crystallinity in said silicon coating film compared to that after said first annealing process.
41 . A method for making a thin film device according to claim 40 , wherein said second annealing process is performed by laser annealing or lamp annealing.
42 . A method for making a thin film device according to any one of claims 39 to 41 , wherein said third step further comprises:
forming a layer containing an impurity by coating onto said silicon coating film, and
heating said layer containing said impurity to diffuse said impurity into said silicon coating film.
43 . A method for making a thin film device according to claim 35 , wherein said manufacturing steps of said at least one conductive layer comprises:
a first step applying a coating solution containing conductive particles onto said substrate, and a second step applying a first annealing process onto the coated surface to form a conductive coating film; said at least one conductive layer being formed of said conductive coating film.
44 . A method for making a thin film device according to claim 43 , wherein a second annealing process at a temperature higher than that in said first annealing process is performed after said second annealing process so as to reduce the resistance of said conductive coating film compared to that after said first annealing process.
45 . A method for making a thin film device according to claim 44 , wherein said second annealing process is performed by laser annealing or lamp annealing.
46 . A method for making a thin film device according to claim 35 , wherein said manufacturing steps of said at least one conductive layer comprises:
a first annealing step annealing said coated surface in an oxygen atmosphere or a nonreductive atmosphere, and a second annealing step annealing said coated surface in a hydrogen atmosphere or a reductive atmosphere; said at least one conductive layer being formed of a transparent conductive coating film.
47 . A method for making a thin film device according to claim 46 , wherein the annealing temperature in said second annealing step is set to a temperature lower than the annealing temperature in said first annealing step.
48 . A method for making a thin film device according to either claim 46 or 47 , wherein after said second annealing step said substrate is maintained in a nonoxidative atmosphere until the temperature of said substrate decreases to 200° C. or less.
49 . A method for making a thin film device according to any one of claims 46 to 48 , wherein a coating solution containing indium (In) and tin (Sn) is applied onto said substrate to form said transparent conductive coating film by an ITO coating film.
50 . A method for making a thin film device according to claim 49 , wherein said method further comprises a step for metal-plating on the surface of said ITO coating film after said second annealing step.
51 . A method for making a thin film device according to claim 49 , wherein said method further comprises a step for forming a conductive sputtering film onto the contact face of said ITO coating film by a sputtering process.
52 . A method for making a thin film device according to any one of claims 35 to 51 , wherein in the coating step of said solution, said solution is applied onto only the coating region on said substrate to form a patterned coating film on said substrate.
53 . A method for making a thin film device comprising:
preparing a coating solution-dispenser head having a plurality of nozzles, and discharging said coating solution onto only the coating region on a substrate while changing a relative position between said substrate and said plurality of nozzles to form a patterned coating film on said substrate.
54 . A method for making a thin film device according to claim 53 , wherein said a plurality of nozzles are independently controlled in discharging states or nondischarging states, and the relative position between said substrate and said a plurality of nozzles is changed while controlling the coating timing at individual nozzles.
55 . A method for making a thin film device according to either claim 53 or 54 , wherein said coating solution is a resist solution, and said resist solution is applied in accordance with a given pattern and then annealed to pattern-form a resist film.
56 . A method for making a thin film device according to either claim 53 or 54 , wherein said coating solution contains a constituent of a thin film which is pattern-formed onto said substrate, and said coating solution is applied in accordance with a given pattern and then annealed to pattern-form said thin film.
57 . A method for making a thin film device according to claim 56 , wherein said thin film is a conductive layer having a given pattern.
58 . A method for making a thin film device according to claim 56 , wherein said thin film is an insulating layer having a given pattern.
59 . A method for making a thin film device according to claim 58 , wherein a contact hole is simultaneously formed in said insulating layer.Join the waitlist — get patent alerts
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