Semiconductor device and manufacturing method therefor

Abstract

A semiconductor device having a trench element separation region is disclosed. A pad oxide film ( 2 ), and a silicon nitride film ( 3 ) may be formed on a semiconductor substrate ( 1 ). A trench ( 4 ) may be formed by dry etching using the silicon nitride film ( 3 ) as a mask. The silicon substrate ( 1 ) may be thermally oxidized using the silicon nitride film ( 3 ) as an oxidation mask and a modified layer may be formed on the surface of the silicon nitride film ( 3 ). The modified layer may be removed by a neutral radical containing fluorine. The surface of the silicon nitride film ( 3 ) may be etched by a predetermined thickness. A filling insulation film may be deposited to completely fill the trench ( 4 ). The insulation film may then be chemical mechanical polished using the silicon nitride film ( 3 a ) as a polishing stopper to form a trench element separation insulation material ( 8 ).

What is claimed is:  
     
         1 . A semiconductor device, comprising: 
 a trench element separation region including a trench formed in a surface of a semiconductor substrate, the trench element separation region isolating separate semiconductor elements;    an oxide film formed on inner walls of the trench;    a trench filling insulating material filling the trench and having edges above the inner walls of the trench; and    wherein a top section of the trench and the edges of the trench filling insulating material are formed so as to be essentially located on the same plane.    
     
     
         2 . The semiconductor device of  claim 1 , wherein the edges of the trench filling insulating material are defined by side edges of a sacrificial layer.  
     
     
         3 . The semiconductor device of  claim 2 , wherein the sacrificial layer is a silicon nitride film.  
     
     
         4 . The semiconductor device of  claim 3 , wherein: 
 the side edges of the sacrificial layer are formed by an etching process including a neutral radical.    
     
     
         5 . The semiconductor device of  claim 1 , wherein the semiconductor elements are insulated gate field effect transistors (IGFETs).  
     
     
         6 . The semiconductor device of  claim 5 , wherein the IGFETs include opposite conductivity types.  
     
     
         7 . A semiconductor device, comprising: 
 a trench element separation region including a trench formed in a surface of a semiconductor substrate, the trench element separation region isolating a first doped channel layer of a first insulated gate field effect transistor (IGFET) from a second doped channel layer of a second IGFET;    an oxide film formed on inner walls of the trench;    a trench filling insulating material filling the trench and having edges above the inner walls of the trench; and    wherein inner wall edges in a top section of the trench and the edges of the trench filling insulating material are formed so as to be essentially located on the same plane.    
     
     
         8 . The semiconductor device of  claim 7 , wherein the edges of the trench filling insulating material are defined by side edges of a sacrificial layer.  
     
     
         9 . The semiconductor device of  claim 8 , wherein: 
 the side edges of the sacrificial layer are formed by an etching process including a fluorine radical.    
     
     
         10 . The semiconductor device of  claim 7 , wherein the first and second doped channel layers are of the same conductivity types.  
     
     
         11 . The semiconductor device of  claim 7 , wherein the first and second doped channel layers are of opposite conductivity types.  
     
     
         12 . A method for forming a trench element separation region on a surface of a semiconductor substrate, comprising the steps of: 
 depositing a first insulation film onto the surface of the semiconductor substrate;    depositing and patterning a second insulation film to form a second insulation film pattern;    dry etching the semiconductor substrate using the second insulation film pattern as an etching mask to form a trench;    forming an oxide film on an inner wall of the trench by thermally oxidizing the semiconductor substrate using the second insulation film pattern as an oxidation mask;    removing a modified layer formed on the surface of the second insulation film during the thermal oxidation step by using a neutral radical including fluorine;    etching the surface of the second insulation film by a predetermined thickness after the modified layer is removed;    depositing a filling insulation film over the whole surface of the trench to completely fill the trench after the surface of the second insulation film is etched; and    chemically mechanical polishing the filling insulation film using the second insulation film as a polishing stopper to form a trench filling insulating material.    
     
     
         13 . The method for manufacturing a semiconductor device according to  claim 12 , wherein: 
 the second insulation film includes a silicon nitride film.    
     
     
         14 . The method for manufacturing a semiconductor device according to  claim 12 , wherein: 
 the semiconductor substrate is a silicon substrate and the neutral radical is a fluorine radical.    
     
     
         15 . The method for manufacturing a semiconductor device according to  claim 14 , wherein: 
 a final judgment of the modified layer removal is performed by measuring a change in intensity of emissions with a wavelength of approximately 336 nm from a reaction product NH.    
     
     
         16 . The method for manufacturing a semiconductor device according to  claim 14 , wherein: 
 a final judgment of the modified layer removal is performed by measuring a change in intensity of emissions with a wavelength of approximately 388 nm from a reaction product CN.    
     
     
         17 . The method for manufacturing a semiconductor device according to  claim 14 , wherein: 
 the thickness of the second insulation film is etched for adjustment such that edges of the trench insulating material above the inner walls of the trench are essentially located on the same plane as edges of the inner walls of the trench in a top section of the trench.    
     
     
         18 . The method for manufacturing a semiconductor device according to  claim 14 , further including the step of: 
 forming a doped channel layer of an insulated gate field effect transistor (IGFET) by ion implantation and heat treatment after the trench filling insulating material is formed.    
     
     
         19 . The method for manufacturing a semiconductor device according to  claim 14 , wherein: 
 the first insulation film is a silicon oxide film formed by thermal oxidation of the semiconductor substrate; and    the filling insulation film is a silicon oxide film deposited by a vapor deposition method.    
     
     
         20 . The method for manufacturing a semiconductor device according to  claim 14 , wherein: 
 the trench element separation region isolates a first insulated gate field effect transistor (IGFET) from a second IGFET.