Method of making chip scale package

Abstract

A method of making a chip scale package comprises the following steps: providing a semiconductor chip having a plurality of metal bumps formed on the active surface thereof; providing a metal plate having a plurality of flip-chip pads formed on a surface thereof; positioning the semiconductor chip on the surface of the metal plate with the metal bumps on the chip aligned with the flip-chip pads on the metal plate; connecting the metal bumps on the active surface of the semiconductor chip to the flip-chip pads on the surface of the metal plate; encapsulating the semiconductor chip against a portion of the surface of the metal plate; removing the metal plate while leaving the flip-chip pads intact; and forming a plurality of solder balls on the flip-chip pads. Using the technique of the present invention, it becomes possible that the manufacture of a molded chip scale package can be relatively simplified and economical, yet highly reliable.

What is claimed is:  
     
         1 . A chip scale package comprising: 
 a semiconductor chip having a plurality of metal bumps formed on the active surface thereof, the semiconductor chip and the metal bumps are encapsulated with a package body such that each metal bump has at least a portion exposed from the package body;    a plurality of flip-chip pads having opposing upper and lower surfaces, the upper surfaces of the flip-chip pads are exposed from the solder mask.    
     
     
         2 . The chip scale package as claimed in  claim 1 , further comprising a plurality of solder balls mounted on the flip-chip pads.  
     
     
         3 . The chip scale package as claimed in  claim 1 , wherein the flip-chip pads are made of metal selected from the group consisted of gold and palladium.  
     
     
         4 . A chip scale package, wherein the chip scale package is formed from 
 a metal plate having a plurality of flip-chip pads formed on a surface thereof,    the semiconductor chip being positioned on the surface of the metal plate with the metal bumps on the chip aligned with the flip-chip pads on the metal plate;    the metal bumps on the active surface of the semiconductor chip being connected to the flip-chip pads on the surface of the metal plate;    the semiconductor chip being encapsulated against a portion of the surface of the metal plate; and    the metal plate being removed so as to leave the flip-chip pads intact.    
     
     
         5 . A chip scale package, wherein the chip scale package is formed from 
 a solder mask on a surface of a metal plate with predetermined areas on the surface of the metal plate exposed from the solder mask;    a metal coating on the exposed areas of the metal plate that form a plurality of flip-chip pads on the surface of the metal plate;    the semiconductor chip being positioned on the surface of the metal plate with the metal bumps on the chip aligned with the flip-chip pads on the metal plate;    the metal bumps on the active surface of the semiconductor chip being connected to the flip-chip pads on the surface of the metal plate;    the semiconductor chip being encapsulated against a portion of the surface of the metal plate; and    the metal plate being removed so as to leave the flip-chip pads intact.