Method of deposition of a single-crystal silicon region

Abstract

The present invention relates to a method of deposition of a silicon layer on a single-crystal silicon substrate, so that the silicon layer is a single-crystal layer, but of different orientation than the substrate, including the steps of defining a window on the substrate; creating inside the window interstitial defects with an atomic proportion lower than one for one hundred; and performing a silicon deposition in conditions generally corresponding to those of an epitaxial deposition, but at a temperature lower than 850° C.

What is claimed is:  
     
         1 . A method of deposition of a silicon layer on a single-crystal silicon substrate, so that the silicon layer is a single-crystal layer, but of different orientation than the substrate, including the steps of: 
 defining a window on the substrate;    creating inside the window interstitial defects with an atomic proportion lower than one for one hundred; and    performing a silicon deposition in conditions generally corresponding to those of an epitaxial deposition, but at a temperature lower than 900° C.    
     
     
         2 . The method of  claim 1 , wherein the deposition temperature ranges between 600° C. and 700° C.  
     
     
         3 . The method of  claim 2 , wherein the step of defect creation includes an implantation step.  
     
     
         4 . The method of  claim 3 , wherein the implantation is performed through a silicon oxide layer of a thickness lower than 10 nm and wherein this implantation is followed by a step of removal of the silicon oxide layer.  
     
     
         5 . The method of  claim 3 , wherein the implantation is an implantation of an electrically neutral element.  
     
     
         6 . The method of  claim 3 , wherein the implantation is an implantation of an element chosen from the group containing fluorine, silicon, germanium, boron, indium, phosphorus, arsenic, and antimony.  
     
     
         7 . The method of  claim 6 , wherein the implantation of an electrically neutral element is a fluorine implantation at 12 keV, at 10 13  at./cm 2 .  
     
     
         8 . The method of  claim 1 , wherein the window opening has a width lower than 5 μm, preferably, on the order of 0.35 μm.  
     
     
         9 . The method of  claim 8 , wherein the width of the window opening is reduced by compound spacers.  
     
     
         10 . The method of  claim 9 , wherein the compound spacers comprise silicon nitride regions, and polysilicon spacers.