Vertical source/drain contact semiconductor

Abstract

A semiconductor device and manufacturing process therefor is provided in which angled dopant implantation is followed by the formation of vertical trenches in the silicon on insulator substrate adjacent to the sides of the semiconductor gate. A second dopant implantation in the exposed the source/drain junctions is followed by a rapid thermal anneal which forms the semiconductor channel in the substrate. Contacts are then formed which connect vertically to the exposed source/drain junctions either directly or through salicided contact areas.

The invention claimed is:  
     
         1 . A semiconductor device comprising: 
 a semiconductor substrate;    a gate dielectric having two opposite sides disposed over the semiconductor substrate, the gate dielectric having an edge adjacent the semiconductor substrate;    a gate having two opposite sides disposed over the gate dielectric, the gate having an edge over the edge of the gate dielectric;    source/drain junctions disposed adjacent the sides of the gate dielectric in the semiconductor substrate;    the semiconductor substrate having contact trenches provided therein adjacent the sides of the gate dielectric and exposing the source/drain junctions; and    conductive contacts disposed in the contact trenches conductively connected to the source/drain junctions.    
     
     
         2 . The semiconductor device as claimed in  claim 1  wherein the conductive contacts completely fill the contact trenches.  
     
     
         3 . The semiconductor device as claimed in  claim 1  including saliciding with a metal silicide around and in the contact trenches and wherein the conductive contacts fill a portion of the contact trenches.  
     
     
         4 . The semiconductor device as claimed in  claim 1  wherein the source/drain junctions have vertical areas exposed by the contact trenches.  
     
     
         5 . The semiconductor device as claimed in  claim 1  wherein the conductive contacts have vertical conductive connections.  
     
     
         6 . The semiconductor device as claimed in  claim 1  wherein the source/drain junctions include extension source/drain junctions in the semiconductor substrate around the contact trenches, the extension source/drain junctions are closest together below the surface of the semiconductor substrate.  
     
     
         7 . The semiconductor device as claimed in  claim 1  including an insulator layer disposed below the semiconductor substrate; and a further semiconductor substrate disposed below the insulator layer.  
     
     
         8 . The semiconductor device as claimed in  claim 1  including an isolation insulator disposed around the source/drain junctions and the contact trenches, the isolation insulator disposed in the semiconductor substrate.  
     
     
         9 . A semiconductor device comprising: 
 a silicon substrate;    a gate oxide layer having two opposite sides disposed over the silicon substrate, the gate oxide layer having an edge adjacent the silicon substrate;    a polysilicon gate having two opposite sides disposed over the gate oxide layer, the polysilicon gate having an edge over the edge of the gate oxide layer;    source/drain junctions disposed adjacent the sides of the gate oxide layer in the silicon substrate;    the silicon substrate having contact trenches provided therein adjacent the sides of the gate oxide layer and exposing the source/drain junctions; and    conductive contacts disposed in the contact trenches conductively connected to the source/drain junctions.    
     
     
         10 . The semiconductor device as claimed in  claim 9  wherein the conductive contacts completely fill the contact trenches.  
     
     
         11 . The semiconductor device as claimed in  claim 9  including saliciding with a metal silicide around and in the contact trenches and wherein the conductive contacts fill portions of the contact trenches.  
     
     
         12 . The semiconductor device as claimed in  claim 9  wherein the source/drain junctions have vertical areas exposed by the contact trenches.  
     
     
         13 . The semiconductor device as claimed in  claim 9  wherein the conductive contacts have vertical conductive connections.  
     
     
         14 . The semiconductor device as claimed in  claim 9  wherein the source/drain junctions include extension source/drain junctions in the silicon substrate around the contact trenches, the extension source/drain junctions are closest together below the surface of the silicon substrate.  
     
     
         15 . The semiconductor device as claimed in  claim 9  including an insulator layer disposed below the silicon substrate; and a further silicon substrate disposed below the insulator layer.  
     
     
         16 . The semiconductor device as claimed in  claim 9  including an isolation trench disposed around the source/drain junctions and the contact trenches, the isolation trench disposed in the silicon substrate.  
     
     
         17 . A method of manufacturing a semiconductor device, comprising the steps of: 
 providing a semiconductor substrate;    forming a gate dielectric layer over the semiconductor substrate;    forming a gate layer over the gate dielectric layer;    etching the gate dielectric layer and the gate layer to form a gate stack;    implanting source/drain junctions adjacent the sides of the gate stack;    forming contact trenches in the semiconductor substrate to expose the source/drain junctions, the contact trenches adjacent the opposite sides of the gate stack; and    forming conductive contacts in the contact trenches conductively connected with the source/drain junctions.    
     
     
         18 . The method of manufacturing a semiconductor device as claimed in  claim 17  wherein the step of forming the conductive contacts completely fills the contact trenches.  
     
     
         19 . The method of manufacturing a semiconductor device as claimed in  claim 17  including a step of saliciding with a metal silicide around and in the contact trenches and wherein the step of forming conductive contacts fills portions of the contact trenches.  
     
     
         20 . The method of manufacturing a semiconductor device as claimed in  claim 17  wherein the step of forming the source/drain junctions implanting dopant into the exposed source/drain junctions in the contact trenches.  
     
     
         21 . The method of manufacturing a semiconductor device as claimed in  claim 17  wherein the step of forming the conductive contacts forms vertical conductive connections.  
     
     
         22 . The method of manufacturing a semiconductor device as claimed in  claim 17  wherein the step of forming the source/drain junctions include forming extension source/drain junctions in the semiconductor substrate around the contact trenches and forming the extension source/drain junctions closest together below the surface of the semiconductor substrate.  
     
     
         23 . The method of manufacturing a semiconductor device as claimed in  claim 17  including the steps of forming the semiconductor substrate on an insulator layer and. of forming the insulator layer on a further semiconductor substrate.  
     
     
         24 . The method of manufacturing a semiconductor device as claimed in  claim 17  including a step of forming an isolation insulator around the source/drain junctions and the contact trenches, the isolation insulator formed in the semiconductor substrate.  
     
     
         25 . A method of manufacturing a semiconductor device, comprising the steps of: 
 providing a silicon substrate;    forming a gate oxide layer over the silicon substrate;    forming a polysilicon gate layer over the gate oxide layer;    etching the gate oxide layer and the polysilicon gate layer to form a gate stack;    implanting source/drain junctions adjacent the sides of the gate stack;    forming contact trenches in the silicon substrate to expose the source/drain junctions, the contact trenches adjacent the opposite sides of the gate stack; and    forming conductive contacts in the contact trenches in conductive connection with the source/drain junctions.    
     
     
         26 . The method of manufacturing a semiconductor device as claimed in  claim 25  wherein the step of forming the conductive contacts completely fills the contact trenches.  
     
     
         27 . The method of manufacturing a semiconductor device as claimed in  claim 25  including the step of saliciding with a metal silicide around and in the contact trenches and wherein the step of forming the conductive contacts fills portions of the contact trenches.  
     
     
         28 . The method of manufacturing a semiconductor device as claimed in  claim 25  wherein the step of forming the source/drain junctions forms vertical areas exposed by the contact trenches.  
     
     
         29 . The method of manufacturing a semiconductor device as claimed in  claim 25  wherein the step of forming the conductive contacts forms vertical conductive connections.  
     
     
         30 . The method of manufacturing a semiconductor device as claimed in  claim 25  wherein the step of forming the source/drain junctions include forming extension source/drain junctions in the silicon substrate around the contact trenches, the extension source/drain junctions are formed closest together below the surface of the silicon substrate.  
     
     
         31 . The method of manufacturing a semiconductor device as claimed in  claim 25  including the step of providing an insulator layer disposed below the silicon substrate and providing a further silicon substrate disposed below the insulator layer.  
     
     
         32 . The method of manufacturing a semiconductor device as claimed in  claim 25  including the step of forming an isolation trench around the source/drain junctions and the contact trenches, the isolation trench formed in the silicon substrate.