Method of manufacturing a semiconductor integrated circuit device

Abstract

Decreasing foreign materials adhering to a semiconductor substrate to improve a yield and decreasing handling errors for the semiconductor substrate to improve an operating ratio of the semiconductor manufacturing apparatus. A sealed type container accommodating a semiconductor substrate is positioned to a load port of a semiconductor manufacturing apparatus. These miconductor substrate is taken out of the container. An ionizer is used for static-eliminating the semiconductor substrates before and after process treatment in a transport area between the load port and a treatment section. The static-eliminated semiconductor substrate is accommodated in the container positioned to the load port. Thus, it is possible to decrease foreign materials adhering to the semiconductor substrate and errors in handling the semiconductor substrate.

What is claimed is:  
     
         1 . A method of manufacturing a semiconductor integrated circuit device, comprising the steps of: 
 (a) linking an internal space of a first sealed type semiconductor-accommodating container which accommodates and is filled with a plurality of wafers grounded, to a local cleaning chamber of a first wafer treatment apparatus with cleanliness kept;    (b) transporting at least of one of said plurality of wafers accommodated in said first semiconductor-accommodating container under said linking state by means of a transport mechanism provided in said local cleaning chamber, and thereby accommodating the at least one in a wafer treatment section of said first wafer treatment apparatus;    (c) executing a first treatment relative to said wafer accommodated in said first wafer treatment section;    (d) transporting said processed wafer by said transport mechanism after said step (c), and thereby accommodating said processed wafer grounded in said first semiconductor-accommodating container;    (e) static-eliminating said processed wafer after said step (c) and before the step (d), or during the step (d); and    (f) releasing the linking state between said first semiconductor-accommodating container and said local cleaning chamber after said step (d), and thereby returning said first semiconductor-accommodating container to a full state.    
     
     
         2 . The method of manufacturing a semiconductor integrated circuit device according to  claim 1 , 
 wherein said wafer has a diameter of 280 mm or more.    
     
     
         3 . The method of manufacturing a semiconductor integrated circuit device according to  claim 1 , 
 wherein a contact portion of said wafer in said first semiconductor-accommodating container has a surface resistivity R of 1×10 4 ≦R(Ω)≦1×10 14 .    
     
     
         4 . The method of manufacturing a semiconductor integrated circuit device according to  claim 1 , 
 wherein a contact portion of said wafer in said first semiconductor-accommodating container has a surface resistivity R of 1×10 5 ≦R(Ω)≦1×10 13 .    
     
     
         5 . The method of manufacturing a semiconductor integrated circuit device according to  claim 1 , 
 wherein a contact portion of said wafer in said first semiconductor-accommodating container has a surface resistivity R of 1×10 6 ≦R(Ω)≦1×10 9 .    
     
     
         6 . The method of manufacturing a semiconductor integrated circuit device according to  claim 1 , 
 wherein said static elimination is executed by an ionizer.    
     
     
         7 . The method of manufacturing a semiconductor integrated circuit device according to  claim 1 , 
 wherein a contact portion being in contact with said wafer of said transport mechanism is static-eliminated during said static elimination.    
     
     
         8 . A method o manufacturing a semiconductor integrated circuit device, comprising the steps of: 
 (a) linking an internal space of a first sealed type semiconductor-accommodating container which accommodates and is filled with a plurality of wafers, to a local cleaning chamber for a first wafer treatment apparatus with cleanliness kept;    (b) transporting at least of one of said plurality of wafers accommodated in said first semiconductor-accommodating container under said linking state by means of a transport mechanism provided in said local cleaning chamber, and thereby accommodating the at least one in a wafer treatment section of said first wafer treatment apparatus;    (c) executing a first treatment relative to said wafer accommodated in said first wafer treatment section;    (d) transporting said processed wafer by said transport mechanism after said step (c), and thereby accommodating said processed wafer in said first semiconductor-accommodating container; and    (e) releasing the linking state between said first semiconductor-accommodating container and said local cleaning chamber after said step (d), and thereby returning said first semiconductor-accommodating container to a full state,    wherein said first sealed type semiconductor-accommodating container comprises: 
 (i) a container body on which a first surface is opened;  
 (ii) a container cover for maintaining a full state by closely being in contact with said container body at a peripheral portion of said first surface in a full state; and  
 (iii) a keyhole section provided in said container cover, and wherein said local cleaning chamber comprises: 
 (I) a front surface portion being in contact with or closely facing said first surface of said first sealed type semiconductor-accommodating container during a linking state;  
 (II) a connection opening portion provided on said front surface portion; and  
 (III) an opener provided so as to cover said connection opening portion and having a key portion connected to said keyhole portion projected during the link, and  
 
   wherein said step (a) further includes the sub-steps of: 
 (p) contacting to or closely facing said first surface of said sealed type semiconductor-accommodating container which accommodates and is filled with said plurality of wafers, and said front surface portion of said local cleaning chamber, such that said key portion can be inserted into said keyhole;  
 (q) maintaining a front surface of said opener so as to projecting over 0.25 mm from said front surface in the case where said first sealed type semiconductor-accommodating container is not provided, before and after, or during said step (p); and  
 (r) executing an unlocking operation with said key portion inserted into said keyhole, and thereafter withdrawing said opener into said local cleaning chamber, and thereby linking said internal space of said first sealed semiconductor-accommodating container to said local cleaning chamber of said first wafer treatment apparatus.  
   
     
     
         9 . The method of manufacturing a semiconductor integrated circuit device according to  claim 8 , 
 wherein said wafer has a diameter of 280 mm or more.    
     
     
         10 . The method of manufacturing a semiconductor integrated circuit device according to  claim 8 , 
 wherein said projecting length of said opener is over 0.3 mm.    
     
     
         11 . The method of manufacturing a semiconductor integrated circuit device according to  claim 8 , 
 wherein said projecting length of said opener is over 0.7 mm.    
     
     
         12 . The method of manufacturing a semiconductor integrated circuit device according to  claim 8 , 
 wherein said projecting length of said opener is over 1.0 mm.    
     
     
         13 . The method of manufacturing a semiconductor integrated circuit device according to  claim 8 , 
 wherein said step (q) is executed before said step (p).    
     
     
         14 . The method of manufacturing a semiconductor integrated circuit device according to  claim 8 , 
 wherein a non-close rate between a front surface portion of said opener and said container cover is 1% or less among all semiconductor-accommodating containers operating on a semiconductor production line, when said first semiconductor-accommodating container and said local cleaning chamber are linked to each other.