Semiconductor imaging device and method for producing same

Abstract

In a semiconductor imaging device, the distance between the edge of a substrate and an edge-most charge collection contact is made as small as possible, preferably less than 500 μm and/or less than ⅓ of the substrate thickness. Additionally or alternatively, a passivation layer is placed between the edge-most portion of the contact and the substrate surface and/or a field shaping conductor adjacent to the surface. A field shaping region may also be arranged outside the edge of the substrate and may encircle each detector device, or it may encircle an arrangement of several devices. In such an arrangement, the spacing between adjacent detectors should be less than 500 μm. A shield may also be used to shield the edge of each detector, or the edge region of the arrangement of several detectors, from incident radiation. Such arrangements can reduce the effect of edge image deterioration caused by strong field non-uniformities at the detector edges.

What is claimed is:  
     
         1 . A semiconductor imaging device comprising a substrate of semiconductive material and a charge collection contact formed thereon, wherein the charge collection contact is spaced from an edge of the substrate by a distance between 0 and about 500 μm.  
     
     
         2 . The semiconductor imaging device of  claim 1 , wherein said distance is between 0 and a value not significantly greater than about 300 μm.  
     
     
         3 . The semiconductor imaging device of  claim 1 , wherein said distance is between 0 and a value not significantly greater than about 100 μm.  
     
     
         4 . The semiconductor imaging device of  claim 1 , wherein said distance is between 0 and a value not significantly greater than about 50 μm.  
     
     
         5 . The semiconductor imaging device of  claim 1 , wherein said distance is between 0 and a value not significantly greater than about 30 μm.  
     
     
         6 . The semiconductor imaging device of  claim 1 , wherein at least one of an edge-most portion of the charge collection contact and a portion of a field shaping conductor is spaced from a surface of the substrate by a passivation material.  
     
     
         7 . The semiconductor imaging device of  claim 1 , further comprising an outer non-sensitive field shaping region arranged outside and adjacent to an edge of the substrate.  
     
     
         8 . The semiconductor imaging device of  claim 1 , further comprising a means for defining a window region on a sensitive surface of the substrate, said window region being configured to receive incident radiation.  
     
     
         9 . A semiconductor imaging device comprising a substrate of semiconductive material and a charge collection contact formed thereon, wherein the charge collection contact is spaced from an edge of the substrate by a distance between 0 and a value which is not significantly greater than about ⅓ of a thickness of the substrate.  
     
     
         10 . The semiconductor imaging device of  claim 9 , wherein said distance is between 0 and a value which is not significantly greater than about ⅕ of said substrate thickness.  
     
     
         11 . The semiconductor imaging device of  claim 9 , wherein said distance is between 0 and a value which is not significantly greater than about {fraction (1/15)} of said substrate thickness.  
     
     
         12 . The semiconductor imaging device of  claim 9 , wherein said distance is between 0 and a value which is not significantly greater than about {fraction (1/30)} of said substrate thickness.  
     
     
         13 . The semiconductor imaging device of  claim 9 , wherein said distance is between 0 and a value which is not significantly greater than about {fraction (1/50)} of said substrate thickness.  
     
     
         14 . The semiconductor imaging device of  claim 9 , wherein at least one of an edge-most portion of the charge collection contact and a portion of a field shaping conductor is spaced from a surface of the substrate by a passivation material.  
     
     
         15 . The semiconductor imaging device of  claim 9 , further comprising an outer non-sensitive field shaping region arranged outside and adjacent to an edge of the substrate.  
     
     
         16 . The semiconductor imaging device of  claim 9 , further comprising a means for defining a window region on a sensitive surface of the substrate, said window region being configured to receive incident radiation.  
     
     
         17 . A semiconductor imaging device comprising a substrate of semiconductive material and a charge collection contact formed thereon, wherein at least one of an edge-most portion of the charge collection contact and a portion of a field shaping conductor is spaced from a surface of the substrate by a passivation material.  
     
     
         18 . The semiconductor imaging device of  claim 17 , wherein a side of the charge collection contact adjacent to the substrate is stepped away from the surface of the substrate.  
     
     
         19 . The semiconductor imaging device of  claim 18 , wherein the charge collection contact generally presents a step-like profile.  
     
     
         20 . The semiconductor imaging device of  claim 17 , wherein the field shaping conductor is electrically insulated from the substrate by the passivation material.  
     
     
         21 . The semiconductor imaging device of  claim 17 , wherein the field shaping conductor extends adjacent to an edge region of the substrate.  
     
     
         22 . The semiconductor imaging device of  claim 17 , further comprising means for applying a predetermined voltage to the field shaping conductor.  
     
     
         23 . A semiconductor imaging device comprising a substrate of semiconductive material, a charge collection contact formed thereon, and an outer non-sensitive field shaping region arranged outside and adjacent to an edge of the substrate.  
     
     
         24 . The semiconductor imaging device of  claim 23 , wherein the outer non-sensitive field shaping region comprises a conductor which is electrically isolated from the substrate.  
     
     
         25 . The semiconductor imaging device of  claim 24 , further comprising means for applying a predetermined voltage to the conductor of the outer non-sensitive field shaping region.  
     
     
         26 . The semiconductor imaging device of  claim 25 , wherein the outer non-sensitive field shaping region comprises a plurality of conductors, said semiconductor imaging device further comprising a second means for applying a predetermined voltage to another conductor of the outer non-sensitive field shaping region, the first and second means applying different voltages.  
     
     
         27 . The semiconductor imaging device of  claim 24 , wherein said conductor is carried by a dielectric.  
     
     
         28 . A semiconductor imaging device comprising a semiconductor substrate having a radiation sensitive surface and a means for defining a window region on said surface, said window region being smaller than a surface area of the substrate and configured to receive incident radiation.  
     
     
         29 . The semiconductor imaging device of  claim 28 , wherein said means for defining a window region is configured to shield a region of the substrate from incident radiation.  
     
     
         30 . The semiconductor imaging device of  claim 29 , wherein said shielded region corresponds to a portion of the substrate subject to high electric field non-uniformities.  
     
     
         31 . The semiconductor imaging device of  claim 29 , wherein said shielded region comprises an edge region of the substrate.  
     
     
         32 . The semiconductor imaging device of  claim 31 , wherein said means for defining a window region comprises a frame of material which is non-transparent to radiation to be detected.  
     
     
         33 . The semiconductor imaging device of  claim 28 , wherein said means for defining a window region is positioned at least closely adjacent to the radiation sensitive surface of the substrate.  
     
     
         34 . The semiconductor imaging device of  claim 28 , wherein said means for defining a window region is made of steel.  
     
     
         35 . An assembly comprising a plurality of semiconductor imaging devices arranged side-by-side to define an extended surface, and a shield configured to prevent a region of the extended surface from receiving incident radiation, said shield defining an imaging surface smaller than the extended surface.  
     
     
         36 . The assembly of  claim 35 , wherein the imaging devices define an elongated imaging surface.  
     
     
         37 . The assembly of  claim 35 , wherein the imaging devices define a two-dimensional mosaic imaging surface.  
     
     
         38 . An assembly comprising a plurality of semiconductor imaging devices arranged adjacent to each other to define an extended imaging surface, wherein each device comprises a semiconductor substrate responsive to incident radiation, said assembly further comprising an outer field shaping region positioned outside, but closely adjacent to, an outer edge of the extended imaging surface.  
     
     
         39 . The assembly of  claim 38 , wherein the outer field shaping region encompasses an edge of the extended imaging surface defined by the plurality of semiconductor imaging devices.  
     
     
         40 . The assembly of  claim 38 , wherein the outer field shaping region comprises a conductor which is electrically insulated from the adjacent semiconductor imaging devices.  
     
     
         41 . The assembly of  claim 38 , wherein first and second ones of said plurality of semiconductor imaging devices are arranged with respect to one another with an edge-to-edge spacing of not significantly more than about 500 μm.  
     
     
         42 . An assembly comprising first and second semiconductor imaging devices, wherein each device comprises a semiconductor substrate on which is mounted a charge collection electrode for the device, said first and second devices being positioned side-by-side with an edge-to-edge spacing of not significantly more than about 500 μm.  
     
     
         43 . The assembly of  claim 42 , wherein the edge-to-edge spacing is not significantly more than about 100 μm.  
     
     
         44 . The assembly of  claim 42 , wherein the edge-to-edge spacing is not significantly more than about 50 μm.