Offsetting comparator device and comparator circuit

Abstract

An offsetting comparator device includes master and slave comparator circuits and a reference differential voltage generator. The master comparator circuit supplies a sensed current corresponding to a potential difference represented by a differential signal on a transmission line. The reference differential voltage generator generates a reference differential voltage based on an intermediate potential of the differential signal. And the slave comparator circuit supplies a current corresponding to the potential difference as offset current. The offsetting comparator device outputs a differential current between the sensed and offset currents and therefore shows an offset in its input/output characteristics. The master and slave comparator circuits have the same circuit configuration. Thus, if the characteristic of the sensed current output from the master comparator circuit has changed due to a potential level variation of the differential signal, then the characteristic of the offset current also changes similarly. Thus, the offsetting comparator device can obtain a constant offset voltage even if the potential level of the differential signal has changed.

What is claimed is:  
     
         1 . An offsetting comparator device for determining whether or not a potential difference represented by a differential signal has exceeded an offset voltage, the device comprising: 
 a master comparator circuit, which receives the differential signal as differential input and supplies a sensed current corresponding to the potential difference represented by the differential input; and    means for supplying an offset current,    wherein the device outputs a current representing a difference between the sensed and offset currents, and    wherein the offset current supply means controls the magnitude of the offset current based on the potential level of the differential signal so as to stabilize the offset voltage.    
     
     
         2 . The device of  claim 1 , wherein the offset current supply means comprises: 
 a reference differential voltage generator, which receives an intermediate potential represented by the differential signal as input and outputs a reference differential voltage corresponding to the intermediate potential; and    a slave comparator circuit, which receives the reference differential voltage as another differential input and outputs a current corresponding to the potential difference as the offset current, the slave comparator circuit having the same configuration as the master comparator circuit.    
     
     
         3 . The device of  claim 2 , wherein each of the master and slave comparator circuits receives the associated differential input at respective parallel gates of p- and n-channel transistors.  
     
     
         4 . The device of  claim 2 , wherein each of the master and slave comparator circuits comprises: 
 a first pair of transistors of one conductivity type, which receive the differential input;    a second pair of transistors of the other conductivity type, which receive the differential input; and    a third pair of transistors of the one conductivity type, through which a current, corresponding to the current flowing through the second pair of transistors, flows by way of a current mirror, and    wherein each said comparator circuit outputs a sum of differential currents of the first and third pairs of transistors, and    wherein a current is supplied from a common constant current source to the first and third pairs of transistors.    
     
     
         5 . The device of  claim 2 , wherein the reference differential voltage generator comprises: 
 a potential generator, which includes a resistor and generates both potentials represented by the reference differential voltage based on the intermediate potential and a voltage drop caused by the resistor; and    a current controller for controlling the amount of current flowing through the resistor such that the voltage drop caused by the resistor becomes constant.    
     
     
         6 . The device of  claim 5 , wherein the potential generator comprises an operational amplifier, which receives the intermediate potential as one of the inputs, and 
 wherein the resistor connects the other input of the operational amplifier to the output thereof, and    wherein the output of the operational amplifier is output as one of the potentials represented by the reference differential voltage.    
     
     
         7 . The device of  claim 5 , wherein the potential generator comprises an operational amplifier, which receives the intermediate potential as one of the inputs, and 
 wherein the resistor includes a first resistor connecting the other input of the operational amplifier to the output thereof and a second resistor connected in series to the first resistor, and    wherein the potential generator outputs potentials at both terminals of the first and second resistors as the potentials represented by the reference differential voltage.    
     
     
         8 . The device of  claim 5 , wherein the potential generator comprises first and second resistors connected in series to each other, the intermediate potential being applied to a connection node of the resistors, 
 wherein the potential generator outputs potentials at both terminals of the first and second resistors as the potentials represented by the reference differential voltage.    
     
     
         9 . The device of  claim 2 , further comprising means for delaying the differential signal for a predetermined time, the delaying means being provided on an input end of the master comparator circuit.  
     
     
         10 . An offsetting comparator device for determining whether or not a potential difference represented by a differential signal has exceeded an offset voltage, the device comprising: 
 a master comparator circuit, which receives the differential signal as differential input and supplies a sensed current corresponding to the potential difference represented by the differential input; and    a slave comparator circuit for supplying an offset current,    wherein the device outputs a current representing a difference between the sensed and offset currents, and    wherein each of the master and slave comparator circuits comprises:    a first pair of transistors of one conductivity type, which receive the differential input;    a second pair of transistors of the other conductivity type, which receive the differential input; and    a third pair of transistors of the one conductivity type, through which a current, corresponding to the current flowing through the second pair of transistors, flows by way of a current mirror, and    wherein each said comparator circuit outputs a sum of differential currents of the first and third pairs of transistors, and    wherein a current is supplied from a common constant current source to the first and third pairs of transistors.    
     
     
         11 . A comparator circuit for supplying a current corresponding to a potential difference represented by a differential input, the circuit comprising: 
 a first pair of transistors of one conductivity type, which receive the differential input;    a second pair of transistors of the other conductivity type, which receive the differential input; and    a third pair of transistors of the one conductivity type, through which a current, corresponding to the current flowing through the second pair of transistors, flows by way of a current mirror, and    wherein the circuit outputs a sum of differential currents of the first and third pairs of transistors, and    wherein a current is supplied from a common constant current source to the first and third pairs of transistors.