Power semiconductor device

Abstract

This invention forms an N-type source layer by self-alignment in a vertical trench IGBT, vertical trench MOSFET, lateral trench IGBT, and lateral trench MOSFET. This decreases the diffused resistance in a P-type base layer to increase the latch-up breakdown voltage, and also lowers the ON voltage by micropatterning of the device.

What is claimed is:  
     
         1 . A power semiconductor device comprising: 
 a first-conductivity-type base layer;    a second-conductivity-type base layer formed on said first-conductivity-type base layer;    a trench extending from a surface of said second-conductivity-type base layer to said first-conductivity-type base layer;    a first-conductivity-type source layer selectively formed along said trench on said second-conductivity-type base layer;    a gate electrode formed, via a gate insulating film, on said second-conductivity-type base layer sandwiched between said first-conductivity-type base layer and said first-conductivity-type source layer in said trench; and    a first main electrode electrically connected to said first-conductivity-type source layer and said second-conductivity-type base layer,    wherein said first-conductivity-type source layer is formed on side walls of said trench without any mask alignment.    
     
     
         2 . A device according to  claim 1 , wherein said first-conductivity-type source layer and said first main electrode are electrically connected by a first-conductivity-type contact layer selectively formed on said second-conductivity-type base layer.  
     
     
         3 . A device according to  claim 1 , wherein in said trench, an impurity-doped glass layer is deposited on an insulating film formed on said gate electrode, and said first-conductivity-type source layer is formed by diffusion from said glass layer.  
     
     
         4 . A device according to  claim 1 , wherein in said trench, said first main electrode is formed on said insulating film attached on top of said gate electrode, and said first main electrode and said first-conductivity-type source layer are electrically connected on side walls of said trench.  
     
     
         5 . A device according to  claim 1 , wherein said first-conductivity-type source layer is formed by diffusion by using as a mask a mask material for forming said trench.  
     
     
         6 . A device according to  claim 1 , further comprising: 
 a second-conductivity-type emitter layer formed on a surface of said first-conductivity-type base layer away from a surface on which said second-conductivity-type base layer is formed; and    a second main electrode electrically connected to said second-conductivity-type emitter layer.    
     
     
         7 . A device according to  claim 6 , wherein said first-conductivity-type source layer and said first main electrode are electrically connected by a first-conductivity-type contact layer selectively formed on said second-conductivity-type base layer.  
     
     
         8 . A device according to  claim 6 , wherein in said trench, an impurity-doped glass layer is deposited on an insulating film formed on said gate electrode, and said first-conductivity-type source layer is formed by diffusion from said glass layer.  
     
     
         9 . A device according to  claim 6 , wherein in said trench, said first main electrode is formed on said insulating film attached on top of said gate electrode, and said first main electrode and said first-conductivity-type source layer are electrically connected on side walls of said trench.  
     
     
         10 . A device according to  claim 6 , wherein said first-conductivity-type source layer is formed by diffusion by using as a mask a mask material for forming said trench.  
     
     
         11 . A device according to  claim 1 , further comprising: 
 a first-conductivity-type drain layer formed on a surface of said first-conductivity-type base layer away from a surface on which said second-conductivity-type base layer is formed; and    a second main electrode electrically connected to said first-conductivity-type drain layer.    
     
     
         12 . A device according to  claim 11 , wherein said first-conductivity-type source layer and said first main electrode are electrically connected by a first-conductivity-type contact layer selectively formed on said second-conductivity-type base layer.  
     
     
         13 . A device according to  claim 11 , wherein in said trench, an impurity-doped glass layer is deposited on an insulating film formed on said gate electrode, and said first-conductivity-type source layer is formed by diffusion from said glass layer.  
     
     
         14 . A device according to  claim 11 , wherein in said trench, said first main electrode is formed on said insulating film attached on top of said gate electrode, and said first main electrode and said first-conductivity-type source layer are electrically connected on side walls of said trench.  
     
     
         15 . A device according to  claim 11 , wherein said first-conductivity-type source layer is formed by diffusion by using as a mask a mask material for forming said trench.  
     
     
         16 . A device according to  claim 1 , further comprising: 
 a second-conductivity-type emitter layer selectively formed on a surface of said first-conductivity-type base layer on which said second-conductivity-type base layer is formed; and    a second main electrode electrically connected to said second-conductivity-type emitter layer.    
     
     
         17 . A device according to  claim 16 , wherein said first-conductivity-type source layer and said first main electrode are electrically connected by a first-conductivity-type contact layer selectively formed on said second-conductivity-type base layer.  
     
     
         18 . A device according to  claim 16 , wherein in said trench, an impurity-doped glass layer is deposited on an insulating film formed on said gate electrode, and said first-conductivity-type source layer is formed by diffusion from said glass layer.  
     
     
         19 . A device according to  claim 16 , wherein in said trench, said first main electrode is formed on said insulating film attached on top of said gate electrode, and said first main electrode and said first-conductivity-type source layer are electrically connected on side walls of said trench.  
     
     
         20 . A device according to  claim 16 , wherein said first-conductivity-type source layer is formed by diffusion by using as a mask a mask material for forming said trench.  
     
     
         21 . A device according to  claim 1 , further comprising: 
 a first-conductivity-type drain layer selectively formed on a surface of said first-conductivity-type base layer on which said second-conductivity-type base layer is formed; and    a second main electrode electrically connected to said first-conductivity-type drain layer.    
     
     
         22 . A device according to  claim 21 , wherein said first-conductivity-type source layer and said first main electrode are electrically connected by a first-conductivity-type contact layer selectively formed on said second-conductivity-type base layer.  
     
     
         23 . A device according to  claim 21 , wherein in said trench, an impurity-doped glass layer is deposited on an insulating film formed on said gate electrode, and said first-conductivity-type source layer is formed by diffusion from said glass layer.  
     
     
         24 . A device according to  claim 21 , wherein in said trench, said first main electrode is formed on said insulating film attached on top of said gate electrode, and said first main electrode and said first-conductivity-type source layer are electrically connected on side walls of said trench.  
     
     
         25 . A device according to  claim 21 , wherein said first-conductivity-type source layer is formed by diffusion by using as a mask a mask material for forming said trench.