Vertically mountable semiconductor device and methods

Abstract

A vertically mountable semiconductor device including a plurality of bond pads disposed proximate to a single edge thereof. The bond pads are bumped with an electrically conductive material. The semiconductor device may also include a support member. Alternatively, the semiconductor device may be laminated to one or more adjacent semiconductor devices. The present invention also includes a method of attaching the semiconductor device to a carrier substrate. Preferably, solder paste is applied to terminals on the carrier substrate. The semiconductor device is oriented vertically over the carrier substrate, such that the bumped bond pads align with their corresponding terminals. The bumps are placed into contact with the solder paste. The bumps and solder paste are then fused to form a joint between the each of the bond pads and their respective terminal, establishing an electrically conductive connection therebetween and imparting structural stability to the semiconductor device.

What is claimed is:  
     
         1 . A method for reconfiguring a connection pattern of a preexisting semiconductor device design, comprising: 
 fabricating a semiconductor device of the preexisting design;    fabricating electrical traces in communication with internal circuitry of the semiconductor device and extending toward a single edge thereof; and    forming bond pads adjacent said single edge and in communication with corresponding ones of said electrical traces.    
     
     
         2 . The method of  claim 1 , wherein said forming said bond pads comprises forming each bond pad of said bond pads in-line with others of said bond pads.  
     
     
         3 . The method of  claim 1 , wherein said forming comprises forming each of said bond pads on an active surface of said semiconductor device.  
     
     
         4 . The method of  claim 1 , further comprising positioning a discrete conductive element on at least one of said bond pads.  
     
     
         5 . A method for securing a semiconductor device nonparallel relative to a substrate, comprising: 
 aligning bond pads located adjacent a single edge of the semiconductor device with corresponding terminals of the substrate; and    electrically connecting bond pads located adjacent said single edge with corresponding terminals of the substrate.    
     
     
         6 . The method of  claim 5 , wherein said electrically connecting comprises at least one of positioning and forming discrete conductive elements between said bond pads and said corresponding terminals.  
     
     
         7 . The method of  claim 6 , wherein said positioning comprises placing said discrete conductive elements between said bond pads and said corresponding terminals.  
     
     
         8 . The method of  claim 5 , further comprising: 
 positioning at least one support structure adjacent said single edge of the semiconductor device, said at least one support structure being configured to maintain the nonparallel position of the semiconductor device relative to the substrate.    
     
     
         9 . The method of  claim 8 , wherein said positioning said at least one support structure comprises positioning said at least one support structure on a surface of the semiconductor device opposite a surface on which said bond pads are located.  
     
     
         10 . A method for designing a semiconductor device, comprising: 
 configuring at least one active element;    configuring a plurality of bond pad locations adjacent a single edge of the semiconductor device; and    configuring a plurality of conductive trace locations between said at least one active element and said plurality of bond pad locations.    
     
     
         11 . The method of  claim 10 , wherein said configuring said plurality of bond pad locations comprises configuring each bond pad location of said plurality of bond pad locations to be substantially in-line with other bond pad locations of said plurality of bond pad locations.  
     
     
         12 . The method of  claim 10 , wherein said configuring said plurality of bond pad locations comprises configuring each of said plurality of bond pad locations to be positioned correspondingly to a terminal of a substrate to which the semiconductor device is to be secured in nonparallel relation.  
     
     
         13 . The method of  claim 12 , further comprising: 
 configuring a plurality of discrete conductive elements to connect each bond pad location of said plurality of bond pad locations to said corresponding terminal of the substrate upon placement of the semiconductor device adjacent the substrate in nonparallel relation thereto.    
     
     
         14 . The method of  claim 12 , further comprising: 
 configuring at least one support structure to be positioned adjacent to said single edge and to support the semiconductor device in said nonparallel relation thereto.