High frequency power amplifier system and wireless communication system

Abstract

Disclosed herein is a high frequency power amplifier system having a transistor comprised of a first electrode, a second electrode and a control electrode and for controlling current which flows between the first electrode and the second electrode by applying a potential to the control electrode, and a resistance type potential divider circuit for determining a dc bias potential applied to the control electrode of the transistor, and wherein an input signal is inputted to the control electrode, an output signal is outputted from the first electrode and a control signal is inputted to the resistance type potential divider circuit. One resistor of the resistance type potential divider circuit is comprised of a temperature compensating resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current defined as an output when the control signal is not inputted, assumes a negative temperature characteristic.

What is claimed is:  
     
         1 . A high frequency power amplifier system, comprising: 
 an input terminal;    an output terminal;    a control terminal;    a first semiconductor amplifying device having a control terminal which receives a signal from said input terminal, and a first terminal which outputs a signal corresponding to the signal inputted from said input terminal;    a second semiconductor amplifying device having a control terminal which receives a signal corresponding to the signal outputted from the first terminal of said first semiconductor amplifying device, and a first terminal connected to said output terminal and which outputs a signal according to said signal; and    a first bias circuit connected to said control terminal and which applies a dc bias potential corresponding to a voltage supplied to said control terminal to the control terminal of said first semiconductor amplifying device;    wherein said first bias circuit includes a first resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current used as an output when the signal is not inputted from said input terminal, assumes a negative temperature characteristic.    
     
     
         2 . The high frequency power amplifier system according to  claim 1 , wherein said first bias circuit has a resistance type potential divider circuit, a resistor provided on the high potential side, of resistors included in said resistance type potential divider circuit is said first resistor, which is monolithically formed over a semiconductor substrate with said first semiconductor amplifying device formed therein, and other resistors thereof are externally-provided parts.  
     
     
         3 . The high frequency power amplifier system according to  claim 2 , further including a second bias circuit connected to said control terminal and which applies a dc bias potential corresponding to a voltage supplied to said control terminal to the control terminal of said second semiconductor amplifying device, and 
 wherein said second bias circuit includes a second resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current used as an output when the signal is not inputted from said input terminal, is brought to a negative temperature characteristic.    
     
     
         4 . The high frequency power amplifier system according to  claim 3 , wherein said first bias circuit for applying a bias potential to the control terminal of said first semiconductor amplifying device and said second bias circuit for applying a bias potential to the control terminal of said second semiconductor amplifying device are circuits independent of each other.  
     
     
         5 . The high frequency power amplifier system according to  claim 4 , wherein said input terminal is connected to the output of an amplitude control circuit for controlling the amplitude of a signal supplied to said input terminal.  
     
     
         6 . The high frequency power amplifier system according to  claim 3 , wherein said input terminal is connected to the output of an amplitude control circuit for controlling the amplitude of a signal supplied to said input terminal.  
     
     
         7 . The high frequency power amplifier system according to  claim 1 , wherein said first bias circuit has a resistance type potential divider circuit, a resistor provided on the high potential side, of resistors included in said resistance type potential divider circuit is said first resistor which exhibits a positive temperature characteristic, and other resistors are resistors substantially non-dependent on the temperature.  
     
     
         8 . The high frequency power amplifier system according to  claim 7 , wherein the resistor provided on the high potential side, of said resistance type potential divider circuit is monolithically formed over a semiconductor substrate with a semiconductor amplifying device formed therein, and other resistors thereof are outboard parts.  
     
     
         9 . The high frequency power amplifier system according to  claim 1 , wherein a control electrode of said first semiconductor amplifying device is provided with a lag lead filter comprised of a resistor and a capacitor, and said resistor constituting said lag lead filter is said first resistor.  
     
     
         10 . The high frequency power amplifier system according to  claim 8 , further including at least one or more third semiconductor amplifying devices cascade-connected between said first semiconductor amplifying device and said second semiconductor amplifying device, and wherein said one or more third semiconductor amplifying devices include a control terminal connected to a first terminal of a previous-stage semiconductor amplifying device and a first terminal connected to a control terminal of a subsequent-stage semiconductor amplifying device.  
     
     
         11 . The high frequency power amplifier system according to  claim 1 , wherein said first semiconductor amplifying device operates with class-A amplification.  
     
     
         12 . The high frequency power amplifier system according to  claim 10 , wherein said second semiconductor amplifying device operates with class-AB amplification and other semiconductor amplifying devices operate with the class-A amplification.  
     
     
         13 . The high frequency power amplifier system according to  claim 1 , wherein said each semiconductor amplifying device is comprised of a field effect transistor composed of a silicon semiconductor.  
     
     
         14 . The high frequency power amplifier system according to  claim 1 , wherein said each semiconductor amplifying device comprises a MESFET composed of a compound semiconductor.  
     
     
         15 . The high frequency power amplifier system according to  claim 1 , wherein said each semiconductor amplifying device comprises a high electron mobility transistor composed of a compound semiconductor.  
     
     
         16 . The high frequency power amplifier system according to  claim 1 , wherein said each semiconductor amplifying device comprises a hetero junction bipolar transistor composed of a compound semiconductor.  
     
     
         17 . A wireless communication system having transmission side output means comprising: 
 a high frequency power amplifier module included in the transmission side output means, said high frequency power amplifier module including: 
 an input terminal;  
 an output terminal;  
 a control terminal;  
 a first semiconductor amplifying device having a control terminal which receives a signal from said input terminal, and a first terminal which outputs a signal corresponding to the signal inputted from said input terminal;  
 a second semiconductor amplifying device having a control terminal which receives a signal corresponding to the signal outputted from the first terminal of said first semiconductor amplifying device, and a first terminal connected to said output terminal and which outputs a signal according to said signal; and  
 a first bias circuit connected to said control terminal and which applies a dc bias potential corresponding to a voltage supplied to said control terminal to the control terminal of said first semiconductor amplifying device;  
 wherein said first bias circuit includes a first resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current used as an output when the signal is not inputted from said input terminal, assumes a negative temperature characteristic.  
   
     
     
         18 . The wireless communication system according to  claim 17 , wherein said first bias circuit has a resistance type potential divider circuit, a resistor provided on the high potential side, of resistors included in said resistance type potential divider circuit is said first resistor, which is monolithically formed over a semiconductor substrate with said first semiconductor amplifying device formed therein, and other resistors thereof are outboard parts.  
     
     
         19 . The wireless communication system according to  claim 18 , further including a second bias circuit connected to said control terminal and which applies a dc bias potential corresponding to a voltage supplied to said control terminal to the control terminal of said second semiconductor amplifying device, and 
 wherein said second bias circuit includes a second resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current used as an output when the signal is not inputted from said input terminal, is brought to a negative temperature characteristic.    
     
     
         20 . The wireless communication system according to  claim 19 , wherein said first bias circuit for applying a bias potential to the control terminal of said first semiconductor amplifying device and said second bias circuit for applying a bias potential to the control terminal of said second semiconductor amplifying device are circuits independent of each other.  
     
     
         21 . The wireless communication system according to  claim 20 , further including an amplitude control circuit connected to said input terminal.  
     
     
         22 . The wireless communication system according to  claim 19 , further including an amplitude control circuit connected to said input terminal.  
     
     
         23 . The wireless communication system according to  claim 17 , wherein said first bias circuit has a resistance type potential divider circuit, a resistor provided on the high potential side, of resistors included in said resistance type potential divider circuit is said first resistor which exhibits a positive temperature characteristic, and other resistors are resistors substantially non-dependent on the temperature.  
     
     
         24 . The wireless communication system according to  claim 23 , wherein the resistor provided on the high potential side, of said resistance type potential divider circuit is monolithically formed over a semiconductor substrate with a semiconductor amplifying device formed therein, and other resistors thereof are outboard parts.  
     
     
         25 . The wireless communication system according to  claim 17 , wherein a control electrode of said first semiconductor amplifying device is provided with a lag lead filter comprised of a resistor and a capacitor, and said resistor constituting said lag lead filter is said first resistor.  
     
     
         26 . The wireless communication system according to  claim 24 , further including at least one or more third semiconductor amplifying devices cascade-connected between said first semiconductor amplifying device and said second semiconductor amplifying device, and wherein said one or more third semiconductor amplifying devices include a control terminal connected to a first terminal of a previous-stage semiconductor amplifying device and a first terminal connected to a control terminal of a subsequent-stage semiconductor amplifying device.  
     
     
         27 . The wireless communication system according to  claim 17 , wherein said first semiconductor amplifying device operates with class-A amplification.  
     
     
         28 . The wireless communication system according to  claim 26 , wherein said second semiconductor amplifying device operates with class-AB amplification and other semiconductor amplifying devices operate with the class-A amplification.  
     
     
         29 . The wireless communication system according to  claim 17 , wherein said each semiconductor amplifying device is comprised of a field effect transistor composed of a silicon semiconductor.  
     
     
         30 . The wireless communication system according to  claim 17 , wherein said each semiconductor amplifying device comprises a MESFET composed of a compound semiconductor.  
     
     
         31 . The wireless communication system according to  claim 17 , wherein said each semiconductor amplifying device comprises a high electron mobility transistor composed of a compound semiconductor.  
     
     
         32 . The wireless communication system according to  claim 17 , wherein said each semiconductor amplifying device comprises a hetero junction bipolar transistor composed of a compound semiconductor.  
     
     
         33 . A resistor, comprising: 
 an insulating substrate;    a conductor whose resistance value varies linearly, which is formed over at least the whole surface of said insulating substrate;    an electrode electrically connected to one end of said conductor; and    an electrode electrically connected to the other end of said conductor.    
     
     
         34 . The resistor according to  claim 33 , wherein said conductor is formed of any of silicon, GaAs and germanium.  
     
     
         35 . The resistor according to  claim 33 , wherein said conductor is formed by diffusing an impurity into at least the whole surface of a semi-insulating GaAs substrate.  
     
     
         36 . A high frequency power amplifier system, comprising: 
 an input terminal;    an output terminal;    a bias terminal supplied with a bias voltage;    a first semiconductor amplifying device having a control electrode connected to said input terminal and a first electrode which outputs a signal corresponding to a signal supplied to said input terminal;    a second semiconductor amplifying device having a control electrode which receives a signal based on the signal outputted from said first electrode of said first semiconductor amplifying device, and a first electrode which supplies a signal corresponding to the signal supplied to said control electrode to said output terminal; and    a first resistance type potential divider circuit connected to said bias terminal and which supplies a bias voltage to the control electrode of said first semiconductor amplifying device; and    wherein a first resistor for voltage division, included in said first resistance type potential divider circuit is formed over the same semiconductor chip as said first semiconductor amplifying device, and a second resistor for voltage division is separated from said semiconductor chip.    
     
     
         37 . The high frequency power amplifier system according to  claim 36 , wherein said second resistor is provided between said bias terminal and said control electrode, and said first resistor is provided between said control electrode and a predetermined potential point.  
     
     
         38 . The high frequency power amplifier system according to  claim 37 , further including a second resistance type potential divider circuit connected to said bias terminal and for supplying a bias voltage to the control electrode of said second semiconductor amplifying device, and 
 wherein a third resistor for voltage division, included in said second resistance type potential divider circuit is formed over the same semiconductor chip as said second semiconductor amplifying device, and a fourth resistor for voltage division is separated from said semiconductor chip.    
     
     
         39 . The high frequency power amplifier system according to  claim 38 , wherein said first semiconductor amplifying device performs class-A amplifying operation.  
     
     
         40 . A wireless communication system comprising: 
 a high frequency power amplifier apparatus, which includes: 
 an input terminal;  
 an output terminal;  
 a bias terminal supplied with a bias voltage;  
 a first semiconductor amplifying device having a control electrode connected to said input terminal and a first electrode which outputs a signal corresponding to a signal supplied to said input terminal;  
 a second semiconductor amplifying device having a control electrode which receives a signal based on the signal outputted from said first electrode of said first semiconductor amplifying device, and a first electrode which supplies a signal corresponding to the signal supplied to said control electrode to said output terminal; and  
 a first resistance type potential divider circuit connected to said bias terminal and which supplies a bias voltage to the control electrode of said first semiconductor amplifying device; and  
   wherein a first resistor for voltage division, included in said first resistance type potential divider circuit is formed over the same semiconductor chip as said first semiconductor amplifying device, and a second resistor for voltage division is separated from said semiconductor chip.    
     
     
         41 . The wireless communication system according to claim  40 , wherein said second resistor is provided between said bias terminal and said control electrode, and said first resistor is provided between said control electrode and a predetermined potential point.  
     
     
         42 . The wireless communication system according to claim  41 , further including a second resistance type potential divider circuit connected to said bias terminal and for supplying a bias voltage to the control electrode of said second semiconductor amplifying device, and 
 wherein a third resistor for voltage division, included in said second resistance type potential divider circuit is formed over the same semiconductor chip as said second semiconductor amplifying device, and a fourth resistor for voltage division is separated from said semiconductor chip.    
     
     
         43 . The wireless communication system according to claim  42 , wherein said first semiconductor amplifying device performs class-A amplifying operation.