Semiconductor device and manufacturing method thereof

Abstract

In a method of manufacturing a semiconductor device, a plurality of inter layer conductive path is formed through a first resist pattern which in turn is formed by an exposure of a hole pattern mask. A plurality of conductive lines is formed, adjacent to the layer of the conductive paths, through a second resist pattern which in turn is formed by double exposure of a line pattern mask and the hole pattern mask. Each conductive line is positioned on at least one of the conductive paths. Or alternatively, each conductive path is positioned between the lines.

What is claimed as new and is desired to be secured by Letters Patent of the United States is:  
     
         1 . A method of manufacturing a semiconductor device on a semiconductor substrate comprising the steps of: 
 forming a first layer through a first resist pattern, said first resist pattern being formed by an exposure of a first mask, and    forming a second layer adjacent to said first layer through a second resist pattern, said second resist pattern being formed by double exposure of a second mask and said first mask.    
     
     
         2 . A method of manufacturing a semiconductor device as set forth in  claim 1 , wherein 
 said first mask is used for forming a pattern of a plurality of holes perpendicular to a principal plane of said semiconductor substrate, and    said second mask is used for forming a pattern of a plurality of lines parallel to said principal plane of said semiconductor substrate.    
     
     
         3 . A method of manufacturing a semiconductor device as set forth in  claim 2 , wherein 
 said first layer is composed of a plurality of inter layer conductive paths perpendicular to said principal plane of said semiconductor substrate, and    said second layer is composed of a plurality of conductive lines parallel to said principal plane of said semiconductor substrate.    
     
     
         4 . A method of manufacturing a semiconductor device as set forth in  claim 3 , wherein 
 a plurality of inter layer conductive paths perpendicular to said principal plane of said semiconductor substrate are formed by said first mask, and then    a plurality of conductive lines parallel to said principal plane of said semiconductor substrate are formed by said second mask and said first mask, and further each line is positioned on at least one of said conductive paths.    
     
     
         5 ., A method of manufacturing a semiconductor device as set forth in  claim 1 , wherein 
 a plurality of conductive lines parallel to said principal plane of said semiconductor substrate are formed by said second mask and said first mask, and then    a plurality of inter layer conductive paths perpendicular to a principal plane of said semiconductor substrate are formed by said second mask, and further each conductive path is positioned between said lines.    
     
     
         6 . A method of manufacturing a semiconductor device as set forth in  claim 1 , wherein 
 said first mask includes at least two Levenson phase shift masks, and    said second mask includes at least one Levenson phase shift mask.    
     
     
         7 . A semiconductor device manufactured in accordance with the method of manufacturing a semiconductor device as set forth in claim  1 .