Detector for electromagnetic radiation, pixel structure with high sensitivity using such detector and method of manufacturing such detector

Abstract

The present invention discloses a semiconductor based detector for radiation with a small but effective barrier between the radiation sensitive volume in the semiconductor and the regions and junctions with readout circuitry, and with no or a lower barrier between the semiconductor substrate and the regions and junctions adapted and meant for collecting the charge carriers generated by the radiation in the semiconductor substrate.

28 . A method of manufacturing a CMOS based pixel structure for detecting electromagnetic radiation comprising the steps of: 
 defining a layer of a higher p type doping level in a p type substrate, said layer forming an electrostatic barrier for substantially impeding the diffusion of electrons to said second region, said barrier being formed at the interface between said layer and said substrate;    defining a region for collecting the charge carriers being generated by said radiation, said region being connected to said substrate; and    defining in said layer at least part of a circuit for processing the signal being generated by said charge carriers in said region.    
     
     
         29 . The method as recited in claim  28 , wherein said step of defining said layer is a p type implant, said p type implant being a pwell implant, or a anti-punch through implant, or a blanket implant, or a V th -adjust implant.  
     
     
         30 . A method of manufacturing a CMOS based pixel structure for detecting electromagnetic radiation comprising the steps of: 
 defining a layer of a higher n type doping level in a n type substrate, said layer forming an electrostatic barrier for substantially impeding the diffusion of electrons to said second region, said barrier being formed at the interface between said layer and said substrate;    defining a region for collecting the charge carriers being generated by said radiation, said region being connected to said substrate; and    g connected to said substrate; and    defining in said layer at least part of a circuit for processing the signal being generated by said charge carriers in said region.    
     
     
         31 . The method as recited in claim  30 , further comprising the step of performing a n type implant in at least part of said region, said n type implant decreasing the barrier between said region and said substrate, said n type implant being a nwell implant, or a anti-punch through implant, or a blanket implant, or a V th adjust implant.