Metal deposition process for metal lines over topography
Abstract
A metal layer is formed at high deposition rate over severe topography by a two step process including formation of a seed layer by cold deposition followed by a second portion of the metal layer deposited at a temperature approximating but below a temperature at which metal from a lower metal layer can extrude through vias reaching thereto. The seed layer is preferably limited to a thickness at which the conformality of the cold-deposited metal will not significantly increase severity of surface topography, generally about one-fourth the thickness of the hot-deposited layer. Via connections are formed without voids and a more planar metal layer surface is formed which allows formation of a protective/anti-reflective layer with good integrity while enhancing subsequent lithographic patterning, thereby eliminating alteration of metal surface chemistry by resist developers and resultant residual metal included within the severe topography.
Claims
exact text as granted — not AI-modifiedHaving thus described my invention, what we claim as new and desire to secure by Letters Patent is as follows:
1 . A method of depositing a metal layer on a non-planar surface, said surface including a further metal layer exposed by apertures, said method including the steps of
depositing a first portion of said metal layer at a relatively low temperature, and depositing a second portion of said metal layer over said first portion of said metal layer at a relatively high temperature approximating but below a temperature at which said further metal layer will extrude through said apertures.
2 . A method as recited in claim 1 , wherein one of said metal layer and said further metal layer is an alloy of aluminum and copper.
3 . A method as recited in claim 1 , wherein said relatively high temperature is in the range of 300° C. to 350° C.
4 . A method as recited in claim 2 , wherein said relatively high temperature is in the range of 300° C. to 350° C.
5 . A method as recited in claim 1 , wherein said relatively low temperature is approximately 150° C.
6 . A method as recited in claim 1 , including the further step of
depositing a titanium-containing layer prior to said depositing of said first portion of said metal layer.
7 . A method as recited in claim 1 , including the further step of cooling said metal layer and said surface sufficiently to collapse grain in said metal layer.
8 . A method as recited in claim 1 , including the further step of
deposition a protective/antireflection layer on said metal layer.
9 . A method as recited in claim 9 , wherein said protective/antireflection layer includes TiN.
10 . A method of making a semiconductor device including metal connections in a metal layer and a further metal layer, including the steps of
depositing a first portion of a metal layer at a relatively low temperature, and depositing a second portion of said metal layer over said first portion of said metal layer at a relatively high temperature approximating but below a temperature at which said further metal layer will extrude through said apertures, applying a protective layer over said second portion of said metal layer, and etching said protective metal layer and said metal layer to form an array of conductors which are not bridged by residual metal.
11 . A method as recited in claim 10 , including the further step of
collapsing grain structure of said metal layer by cooling prior to depositing said protective layer.
12 . A method as recited in claim 10 , including the further step of
depositing an adhesion layer prior to depositing said first portion of said metal layer.
13 . A method as recited in claim 10 , wherein a thickness of said first portion of said metal layer is approximately one-fourth a thickness of said second portion of said metal layer.
14 . A semiconductor device including an array of conductors patterned from a metal layer formed over severe topography of at least one micron from top to bottom of said severe topography and including connections formed through vias in an insulating layer, said vias being formed without voids and said severe topography does not include residual metal from said metal layer extending between said conductors.
15 . A semiconductor device as recited in claim 14 , wherein said metal layer includes a layer of TiN.
16 . A device as recited in claim 14 , wherein said metal layer is formed by the steps of
depositing a first portion of said metal layer at a relatively low temperature, and depositing a second portion of said metal layer over said first portion of said metal layer at a relatively high temperature approximating but below a temperature at which said further metal layer will extrude through said apertures.Join the waitlist — get patent alerts
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