US2002014703A1PendingUtilityA1

Semiconductor flip-chip package and method for the fabrication thereof

Priority: Jul 21, 1997Filed: Aug 20, 2001Published: Feb 7, 2002
Est. expiryJul 21, 2017(expired)· nominal 20-yr term from priority
H10W 90/734H10W 90/724H10W 72/07338H10W 72/07236H10W 72/07234H10W 72/07211H10W 72/01353H10W 72/01351H10W 72/01336H10W 72/01331H10W 72/01271H10W 72/01255H10W 72/01215H10W 72/944H10W 72/355H10W 72/354H10W 72/352H10W 72/351H10W 72/345H10W 72/325H10W 72/322H10W 72/252H10W 72/251H10W 72/227H10W 72/073H10W 72/072H10W 72/30H10W 72/29H10W 74/47H10W 74/15H10W 74/012H10W 70/666H10W 70/635H10W 40/778H10W 70/655H10W 72/244H10W 72/242H10W 72/07254B32B 7/12H05K 3/321B23K 35/3618H05K 1/095B23K 35/3613B23K 35/025C09J 4/00
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Claims

Abstract

A simplified process for flip-chip attachment of a chip to a substrate is provided by pre-coating the chip with an encapsulant underfill material having separate discrete solder columns therein to eliminate the conventional capillary flow underfill process. There is also provided a flip-chip configuration having a flexible tape lamination for underfill encapsulation. With this configuration, the complaint solder/flexible encapsulant understructure absorbs the strain caused by the difference in the thermal coefficients of expansion between the chip and the substrate and provides enhanced ruggedness.

Claims

exact text as granted — not AI-modified
We claim:  
     
         1 . An electrical component assembly, comprising: 
 a substrate having a plurality of pads on a first surface thereof;    an integrated circuit chip having a film laminated on an active surface thereof, the film having a plurality of holes therethrough filled with an electrically conductive material that extends from contacts on the active surface aligned with the holes through the film to the plurality of pads on the substrate.    
     
     
         2 . The electrical component assembly of  claim 1  wherein the electrically conductive material in the plurality of holes are discrete solder bumps pre-assembled on the integrated circuit chip.  
     
     
         3 . The electrical component assembly of  claim 1  further comprising a layer of flux adhesive between a subassembly comprising the film and the electrically conductive material and the substrate.  
     
     
         4 . An electrical component assembly, comprising: 
 an integrated circuit chip having a plurality of pads on an active surface thereof;    a substrate having a film laminated on a first surface thereof, the film having a plurality of holes therethrough filled with an electrically conductive material that extends from contacts on the first surface aligned with the holes through the film to the plurality of pads on the integrated circuit chip.    
     
     
         5 . The electrical component assembly of  claim 4  wherein the electrically conductive material in the plurality of holes are discrete solder bumps pre-assembled on the substrate.  
     
     
         6 . The electrical component assembly of  claim 4  further comprising a layer of flux adhesive between a subassembly comprising the film and the electrically conductive material and the integrated circuit chip.  
     
     
         7 . A method for making an electrical component assembly, comprising the steps of: 
 laminating a film on an active surface of an integrated circuit;    producing holes in the film to expose contact pads on the active surface of the integrated circuit chip;    filling the holes with an electrically conductive material;    placing the integrated circuit chip on a substrate with the film located between the integrated circuit chip and the substrate; and    reflowing the electrically conductive material in order to attach the integrated circuit chip to the substrate.    
     
     
         8 . The method of  claim 7  further comprising the step of: 
 coating a surface of the film which faces the substrate with a flux adhesive.  
 
     
     
         9 . The method of  claim 7  wherein the filling step comprises filling the holes with molten solder.  
     
     
         10 . The method of  claim 7  wherein the filling step comprises filling the holes with solder paste.  
     
     
         11 . The method of  claim 7  wherein the holes in the encapsulant are produced by laser drilling.  
     
     
         12 . The method of  claim 7  wherein the holes in the encapsulant are produced by plasma etching.  
     
     
         13 . The method of  claim 7  wherein the holes in the encapsulant are produced by chemical etching.  
     
     
         14 . The method of  claim 7  wherein the holes in the encapsulant are produced by photoimaging.  
     
     
         15 . A method for making an electrical component assembly, comprising the steps of: 
 laminating a film on a substrate;    producing holes in the film to expose contact pads on the substrate;    filling the holes with an electrically conductive material;    placing an integrated circuit chip on a substrate with the film located between the integrated circuit chip and the substrate; and    reflowing the electrically conductive material in order to attach the integrated circuit chip to the substrate.    
     
     
         16 . The method of  claim 15  further comprising the step of: 
 coating a surface of the film which faces the integrated circuit chip with a flux adhesive.  
 
     
     
         17 . The method of  claim 15  wherein the filling step comprises filling the holes with molten solder.  
     
     
         18 . The method of  claim 15  wherein the filling step comprises filling the holes with solder paste.  
     
     
         19 . A method for making an electrical component assembly, comprising the steps of: 
 laminating a film on a substrate having discrete solder bumps thereon;    placing an integrated circuit chip on a substrate with the film located between the integrated circuit chip and the substrate; and    reflowing the solder bumps in order to attach the integrated circuit chip to the substrate.    
     
     
         20 . The method of  claim 18  further comprising the step of: 
 coating a surface of the film which faces the integrated circuit chip with a flux adhesive.  
 
     
     
         21 . A method for making an electrical component assembly, comprising the steps of: 
 laminating a film on an active surface of an integrated circuit chip having discrete solder bumps thereon;    coating a substrate with a portion of an encapsulant;    placing the integrated circuit chip on the substrate with the film and encapsulant portion located between the integrated circuit chip and the substrate;    curing the encapsulant portion; and    reflowing the solder bumps in order to attach the integrated circuit chip to the substrate.    
     
     
         22 . A method for making an electrical component assembly, comprising the steps of: 
 laminating a film on an active surface of an integrated circuit chip having discrete solder bumps thereon;    coating the film with a portion of an encapsulant;    placing the integrated circuit chip on the substrate with the film and encapsulant portion located between the integrated circuit chip and the substrate;    curing the encapsulant portion; and    reflowing the solder bumps in order to attach the integrated circuit chip to the substrate.

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