Packaging structure and method

Abstract

A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side, aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points, pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points, and heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points. Also, a flip chip package is made by the method. In some embodiments the metallurgical connection includes an alloy of gold and tin at the interface between the bumps and the interconnect points.

What is claimed is:  
     
         1 . A method for providing metallurgic connection between a flip chip and a substrate comprises 
 providing a chip having a set of bumps formed on a bump side thereof;    providing a substrate having a set of interconnect points on a metallization thereon;    providing a measured quantity of a polymer adhesive in a middle region of the chip on the bump side;    aligning the chip with the substrate so that the set of bumps aligns with the set of interconnect points;    pressing the chip and the substrate toward one another so that a portion of the polymer adhesive contacts the substrate and the bumps contact the interconnect points; and    heating the bumps to a temperature sufficiently high to form a metallurgical connection between the bumps and the interconnect points.    
     
     
         2 . The method of  claim 1  wherein the bumps are stud bumps.  
     
     
         3 . The method of  claim 1  wherein the bumps comprise gold.  
     
     
         4 . The method of  claim 1  wherein the bumps are plated with a metal comprising gold.  
     
     
         5 . The method of  claim 1  wherein the interconnect points comprise tin.  
     
     
         6 . The method of  claim 5  wherein the interconnect points comprise pure tin.  
     
     
         7 . The method of  claim 1  wherein the interconnect points comprise a metal plated with a metal comprising gold.  
     
     
         8 . The method of  claim 1  wherein the bumps are stud bumps comprising Au and the interconnect points comprise Sn, and the heating step raises the temperature of the bumps sufficiently to create an alloy between the Au and the Sn in a bonding phase at the interface.  
     
     
         9 . The method of  claim 8  wherein the heating step raises the temperature of the bumps sufficiently to create an alloy comprising a 80:20 Au:Sn between in a bonding phase at the interface.  
     
     
         10 . The method of  claim 1  wherein the heating step raises the die to a temperature greater than about 200° C.  
     
     
         11 . The method of  claim 1  wherein the heating step raises the die to a temperature about 232° C.  
     
     
         12 . The method of  claim 1 , further comprising underfilling with a polymer.  
     
     
         13 . A chip package structure made according to the method of  claim 12 .  
     
     
         14 . A chip package structure comprising 
 a chip having a bumps formed thereon and a substrate having interconnect points on a metallization thereon, the bumps forming contacts with the interconnect points, wherein an alloy is formed at an interface between the material of each bump and the material of the interconnect in contact with the bump.    
     
     
         15 . The chip package structure of  claim 14  wherein a cured adhesive polymer is situated in a middle region between the bump surface of the chip and the surface of the substrate.  
     
     
         16 . The chip package structure of  claim 14  wherein the bump material comprises gold and the interconnect points comprise Sn, and the alloy at the interface comprises a Au/Sn alloy.  
     
     
         17 . The chip package structure of  claim 16  wherein the alloy at the interface is a 20:80 Sn:Au alloy.