Nonvolatile semiconductor memory device and fabrication method

Abstract

A nonvolatile semiconductor memory device and a method of fabricating the device are provided that allow the use of dry etching when removing the ONO film and that eliminate the danger of etching the silicon substrate in the gate oxide film formation areas even in the event of over-etching. In the process of fabricating a nonvolatile semiconductor memory device that is provided with a memory cell area including nonvolatile memory and a peripheral circuit area including circuits for controlling the nonvolatile memory, an insulative material that is to become an insulating film overlying floating gate electrodes is formed over the entire surface of each area and over a first conductive layer in the peripheral circuit area, and a dummy pattern is provided in the boundary areas between the memory cell area and peripheral circuit area so as to surround the memory cell area, this dummy pattern being composed of: a first conductive material that constitutes the floating gate electrodes of the nonvolatile memory, a second conductive material that constitutes the control gate electrodes of the nonvolatile memory, and an ONO film that constitutes an insulating film between the floating gate electrodes and the control gate electrodes.

What is claimed is:  
     
         1 . A nonvolatile semiconductor memory device provided with: 
 a memory cell area including nonvolatile memory;    a peripheral circuit area including circuits for controlling said nonvolatile memory; and    a dummy pattern provided in boundary areas between said memory cell area and said peripheral circuit area;    wherein said dummy pattern is made up of: 
 a conductive material that constitutes the control gate electrodes of said nonvolatile memory; and  
 residue of an insulative material that makes up an insulating film between floating gate electrodes and control gate electrodes of said nonvolatile memory that remain without being removed in previous fabrication processes, this residue being covered by said conductive material.  
   
     
     
         2 . A nonvolatile semiconductor memory device according to  claim 1  wherein said insulative material is a film of three-layer structure composed of an oxide film, a nitride film, and an oxide film.  
     
     
         3 . A nonvolatile semiconductor memory device according to  claim 1  wherein said conductive material is conductive polysilicon.  
     
     
         4 . A nonvolatile semiconductor memory device according to  claim 1  wherein said conductive material is a film of two-layer structure composed of an upper layer of refractory metal silicide and a lower layer of conductive polysilicon.  
     
     
         5 . A nonvolatile semiconductor memory device provided with: 
 a memory cell area including nonvolatile memory;    a peripheral circuit area including circuits for controlling said nonvolatile memory; and    a dummy pattern provided in boundary areas between said memory cell area and said peripheral circuit area;    wherein said dummy pattern is made up of: 
 a first conductive material that constitutes floating gate electrodes of said nonvolatile memory, a second conductive material that constitutes control gate electrodes of said nonvolatile memory, and an insulative material that constitutes an insulating film between said floating gate electrodes and said control gate electrodes.  
   
     
     
         6 . A nonvolatile semiconductor memory device according to  claim 5  wherein said insulative material is a film of three-layer structure composed of an oxide film, a nitride film, and an oxide film.  
     
     
         7 . A nonvolatile semiconductor memory device according to  claim 5  wherein said first conductive material and said second conductive material are conductive polysilicon.  
     
     
         8 . A nonvolatile semiconductor memory device according to  claim 5  wherein said first conductive material is conductive polysilicon, said second conductive material is a film of two-layer structure composed of an upper layer of refractory metal silicide and a lower layer of conductive polysilicon.