Apparatus for current pulse generation in voltage down converters

Abstract

A voltage converter circuit for an electronic device includes a transistor switch ( 140 ) for providing current pulses to a current input node. The transistor switch has a gate ( 128 ) and a turn-on threshold voltage. An adjustment circuit ( 114 ) provides a controlled voltage to the gate for turning on the transistor switch and the adjustment circuit includes a subcircuit for compensating for variations in the turn-on threshold voltage of the transistor switch. A timer ( 16 ) for enables the adjustment circuit for a preset period of time.

What is claimed is:  
     
         1 . A voltage converter circuit comprising: 
 a transistor switch for providing current pulses to a current input node, the transistor switch having a gate and a turn-on threshold voltage;    an adjustment circuit for providing a controlled voltage to the gate for turning on the transistor switch and having means for compensating for variations in the turn-on threshold voltage of the transistor switch; and    a timer for enabling the adjustment circuit for a preset period of time.    
     
     
         2 . The voltage converter circuit as recited in  claim 1  wherein the transistor switch is a MOSFET.  
     
     
         3 . The voltage converter circuit as recited in  claim 1  wherein the adjustment circuit contains a transistor having a turn-on threshold voltage substantially equal to the turn-on threshold voltage of the transistor switch.  
     
     
         4 . The voltage converter circuit as recited in  claim 1  wherein the adjustment circuit includes a voltage divider circuit.  
     
     
         5 . The voltage converter circuit as recited in  claim 4  wherein the voltage divider circuit has at least one resistor which can be dimensioned to adjust the gate voltage of the transistor switch.  
     
     
         6 . The voltage converter circuit as recited in  claim 4  wherein the voltage divider circuit includes at least one transistor having a threshold voltage substantially the same as the transistor switch.  
     
     
         7 . The voltage converter circuit as recited in  claim 4  wherein the voltage divider circuit includes at least one transistor having a source and a drain, and the transistor switch has a source and a drain wherein the sources and drains share doped regions.  
     
     
         8 . A semiconductor memory comprising an adjustment current, wherein the adjustment comprises: 
 a first node;    a second node for connecting to a gate of a MOSFET switch;    a feedback circuit connected to the first and second nodes for monitoring voltage changes at the first node and adjusting voltage at a second node to compensate for variations in current flow through the MOSFET switch.    
     
     
         9 . The semiconductor memory as recited in  claim 8  wherein the feedback circuit further comprises a differential amplifier to supply a substantially constant voltage to the first node, a resistor connected between the first node and ground such that a constant current flows through a first transistor, the first transistor having a gate connected to the second node.  
     
     
         10 . The semiconductor memory as recited in  claim 9  wherein the first transistor and the MOSFET switch are PMOSFETs.  
     
     
         11 . The semiconductor memory as recited in  claim 9  wherein the first transistor and the MOSFET switch are NMOSFETs.  
     
     
         12 . The semiconductor memory as recited in  claim 9  wherein the first transistor has a threshold voltage substantially equal to the threshold voltage of the MOSFET switch.  
     
     
         13 . The semiconductor memory as recited in  claim 9  wherein the first transistor has a source and a drain, the MOSFET switch has a source and a drain wherein the sources and drains share doped regions.  
     
     
         14 . A semiconductor memory device voltage down converter comprising: 
 a first node having a reference voltage supplied thereto by a differential amplifier;    a first transistor having a gate connected to a second node, the second node connecting to a gate of a MOSFET switch;    a first resistor connecting between a drain of the first transistor and ground such that constant current flows through the first resistor and the first transistor;    a feedback circuit for monitoring voltage changes at the first node and adjusting voltage at a second node to compensate for variations in the threshold voltage of the MOSFET switch.    
     
     
         15 . The semiconductor memory device voltage down converter as recited in  claim 14  wherein the first transistor and the MOSFET switch are PMOSFETs.  
     
     
         16 . The semiconductor memory device voltage down converter as recited in  claim 14  wherein the first transistor and the MOSFET switch are NMOSFETs.  
     
     
         17 . The semiconductor memory device voltage down converter as recited in  claim 14  wherein the first transistor has a threshold voltage substantially equal to the threshold voltage of the MOSFET switch.  
     
     
         18 . The semiconductor memory device voltage down converter as recited in  claim 14  wherein the first transistor has a source and a drain, the MOSFET switch has a source and a drain wherein the sources and drains share doped regions.