US2002003277A1PendingUtilityA1

Technique for forming shallow trench isolation structure without corner exposure and resulting structure

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Priority: Jan 27, 1997Filed: Aug 30, 2001Published: Jan 10, 2002
Est. expiryJan 27, 2017(expired)· nominal 20-yr term from priority
Inventors:Pai-Hung Pan
H10W 10/17H10W 10/014
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PatentIndex Score
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Claims

Abstract

A shallow isolation trench structure and methods of forming the same wherein the method of formation comprises a layered structure of a buffer film layer over a dielectric layer which is atop a semiconductor substrate. The buffer film layer comprises a material which is oxidation resistant and can be etched selectively to oxide films. The layered structure is patterned with a resist material and etched to form a shallow trench. A thin oxide layer is formed in the trench and the buffer film layer is selectively etched to move the buffer film layer back from the corners of the trench. An isolation material is then used to fill the shallow trench and the buffer film layer is stripped to form an isolation structure. When the structure is etched by subsequent processing step(s), a capped shallow trench isolation structure which covers the shallow trench corners is created.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A precursor to a semiconductor device structure, comprising: 
 a semiconductor device layered structure comprising a semiconductor substrate;    a buffer film layer located over at least a portion of said semiconductor substrate;    at least one trench formed in said semiconductor device layered structure; and    at least one shallow trench isolation structure positioned at least partially within said at least one trench and including: 
 a substantially flat surface; and  
 an integral ledge which extends laterally outward from said trench so as to contact only an area of an active surface of the semiconductor substrate adjacent said trench.  
   
     
     
         2 . The precursor of  claim 1 , wherein said buffer film layer comprises substantially oxidation resistant material.  
     
     
         3 . The precursor of  claim 2 , wherein said substantially oxidation resistant material is selectively etchable.  
     
     
         4 . The precursor of  claim 1 , wherein a lateral edge of said integral ledge contacts said buffer film layer.  
     
     
         5 . The precursor of  claim 1 , wherein said at least one trench isolation structure comprises densified material.  
     
     
         6 . The precursor of  claim 1 , wherein said buffer film layer comprises silicon nitride.  
     
     
         7 . An intermediate semiconductor device structure, comprising: 
 a semiconductor substrate including at least one trench formed therein and at least one trench corner located at a juncture between said at least one trench and an active surface of said semiconductor substrate; and    a buffer film layer over at least portions of said active surface; and    at least one densified trench isolation structure including a substantially flat surface exposed through said buffer film layer, said at least one trench corner being covered by said at least one densified trench isolation structure.    
     
     
         8 . The intermediate semiconductor device structure of  claim 7 , wherein said buffer film layer comprises a substantially oxidation resistant material  
     
     
         9 . The intermediate semiconductor device structure of  claim 7 , further comprising: 
 a layer comprising silicon oxide disposed within said at least one trench and between said semiconductor substrate and said buffer film layer.    
     
     
         10 . The intermediate semiconductor device structure of  claim 9 , wherein said layer comprises densified silicon dioxide.  
     
     
         11 . The intermediate semiconductor device structure of  claim 7 , wherein said at least one trench isolation structure comprises densified material.  
     
     
         12 . The intermediate semiconductor device structure of  claim 7 , wherein said buffer film layer comprises silicon nitride.  
     
     
         13 . An intermediate semiconductor device structure, comprising: 
 a semiconductor substrate including at least one trench formed therein and at least one trench corner located at a juncture between said at least one trench and an active surface of said semiconductor substrate; and    at least one trench isolation structure including a substantially flat surface, said at least one trench isolation structure extending laterally only over a portion of said active surface adjacent said at least one trench corner so as to electrically isolate said at least one trench corner.    
     
     
         14 . The intermediate semiconductor device structure of  claim 13 , wherein said at least one trench isolation structure comprises densified silicon dioxide.  
     
     
         15 . The intermediate semiconductor device structure of  claim 13 , further comprising: 
 a silicon oxide layer disposed between said semiconductor substrate and said at least one trench isolation structure.    
     
     
         16 . The intermediate semiconductor device structure of  claim 15 , wherein said silicon oxide layer comprises densified silicon dioxide.  
     
     
         17 . The intermediate semiconductor device structure of  claim 13 , wherein said buffer film layer comprises silicon nitride.  
     
     
         18 . A precursor to a semiconductor device structure, comprising: 
 a semiconductor substrate;    at least one trench formed in said semiconductor substrate;    a buffer film layer over an active surface of said semiconductor substrate;    and at least one shallow trench isolation structure at least partially within said at least one trench and exposed through said buffer film layer, said at least one shallow trench isolation structure including at least one integral ledge extending laterally outward from said at least one trench so as to contact an area of said active surface adjacent said at least one trench.    
     
     
         19 . The precursor of  claim 18 , wherein said at least one shallow trench isolation structure includes a substantially planar surface.  
     
     
         20 . The precursor of  claim 18 , wherein said at least one shall trench isolation structure comprises densified silicon oxide.  
     
     
         21 . The precursor of  claim 18 , wherein said buffer film layer comprises silicon nitride.  
     
     
         22 . The precursor of  claim 18 , wherein said buffer film layer comprises densified material.  
     
     
         23 . The precursor of  claim 18 , wherein said buffer film layer comprises substantially oxidation resistant material.  
     
     
         24 . The precursor of  claim 23 , wherein said substantially oxidation resistant material is selectively etchable.

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