A low dielectric constant film produced from silicon compounds comprising silicon-carbon bonds

Abstract

A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH 3 SiH 3 , and N 2 O.

What is claimed is:  
     
         1 . A method for depositing a low dielectric constant film, comprising the step of reacting an organo silane compound and an oxidizing gas at conditions sufficient to deposit an oxidized organo silane film on a substrate.  
     
     
         2 . The method of  claim 1 , wherein the organo silane compound has the structure SiH a (CH 3 ) b (C 2 H 5 ) c (C 6 H 5 ) d , where a=1 to 3, b=0 to 3, c=0 to 3, d=0 to 3, and a+b+c+d=4, or the structure Si 2 H e (CH 3 ) f (C 2 H 5 ) g (C 6 H 5 ) h , where e=1 to 5, f=0 to 5, g=0 to 5, h=0 to 5, and e+f+g+h=6.  
     
     
         3 . The method of  claim 1 , wherein the organo silane compound has the structure Si 2 H m (CH 3 ) 6-m , where m=1 to 5, or SiH n (CH 3 ) 4-n , where n=1 to 3.  
     
     
         4 . The method of  claim 1 , wherein the oxidizing gas is N 2 O or O 2 .  
     
     
         5 . A process for depositing a low dielectric constant film, comprising the steps of: 
 positioning a substrate having a patterned metal layer in a reactor;    depositing a conformal lining layer on the patterned metal layer from process gases comprising an organo silane compound and an oxidizing gas; and    depositing a gap filling layer on the lining layer.    
     
     
         6 . The process of  claim 5 , wherein the organo silane compound has the SiH a (CH 3 ) b (C 2 H 5 ) c (C 6 H 5 ) d , where a=1 to 3, b=0 to 3, c=0 to 3, d=0 to 3, and a+b+c+d=4, or the structure Si 2 H e (CH 3 ) f (C 2 H 5 ) g (C 6 H 5 ) h , where e=1 to 5, f=0 to 5, g=0 to 5, h=0 to 5, and e+f+g+h=6.  
     
     
         7 . The process of  claim 5 , wherein the organo silane compound has the structure Si 2 H m (CH 3 ) 6-m , where m=1 to 5, or SiH n (CH 3 ) 4-n , where n=1 to 3.  
     
     
         8 . The process of  claim 5 , wherein the oxidizing gas is N 2 O or O 2 .  
     
     
         9 . The process of  claim 5 , wherein the gap filling layer is deposited by reaction of silane and hydrogen peroxide.  
     
     
         10 . The process of  claim 5 , further comprising the step of depositing a capping layer on the gap filling layer from process gases comprising the organo silane compound and the oxidizing gas.  
     
     
         11 . A substrate processing system, comprising: 
 a reactor comprising a reaction zone, a substrate holder for positioning a substrate in the reaction zone, and a vacuum system;    a gas distribution system connecting the reaction zone of the vacuum chamber to supplies of an organo silane compound and an oxidizing gas;    an RF generator capacitively coupled to the gas distribution system for generating a plasma in the reaction zone;    a controller comprising a computer for controlling the reactor, the gas distribution system, and the RF generator; and    a memory coupled to the controller, the memory comprising a computer usable medium comprising a computer readable program code for selecting a process comprising the step of reacting the organo silane compound and the oxidizing gas at conditions sufficient to deposit an oxidized organo silane film on a substrate.    
     
     
         12 . The substrate processing system of  claim 11 , further comprising computer readable program code for depositing a dual damascene structure.  
     
     
         13 . A substrate processing system, comprising: 
 a reactor comprising a reaction zone, a substrate holder for positioning a substrate in the reaction zone, and a vacuum system;    a gas distribution system connecting the reaction zone of the vacuum chamber to supplies of an organo silane compound and an oxidizing gas;    an RF generator capacitively coupled to the gas distribution system for generating a plasma in the reaction zone;    a controller comprising a computer for controlling the reactor, the gas distribution system, and the RF generator; and    a memory coupled to the controller, the memory comprising a computer usable medium comprising a computer readable program code for selecting a process comprising the steps of: 
 positioning a substrate having a patterned metal layer in a reactor;  
 depositing a conformal lining layer on the patterned metal layer from process gases comprising the organo silane compound and the oxidizing gas; and  
 depositing a gap filling layer on the lining layer.  
   
     
     
         14 . The system of  claim 13 , further comprising computer readable program code for depositing a capping layer on the gap filling layer from process gases comprising the organo silane compound and the oxidizing gas.  
     
     
         15 . A method of forming a dual damascene structure, comprising: 
 depositing a first dielectric film on a substrate;    depositing a low k etch stop on the first dielectric film by reacting an organo silane with an oxidizing gas;    pattern etching the low k etch stop to define a vertical interconnect opening and expose the first dielectric film;    depositing a second dielectric film on the low k etch stop and the exposed first dielectric film; and    pattern etching the second dielectric film to define a horizontal interconnect and continuing to etch the exposed first dielectric film to define the vertical interconnect.    
     
     
         16 . The method of  claim 15  wherein the first and the second dielectric films comprise parylene.  
     
     
         17 . A dual damascene structure, comprising: 
 a first dielectric layer defining one or more vertical interconnects;    a low k patterned etch stop overlying the first low k dielectric layer defining the one or more vertical interconnects, the etch stop comprising an oxidized organo silane; and    a second dielectric layer overlying the patterned low k etch stop and defining one or more horizontal interconnects.    
     
     
         18 . The structure of  claim 17  wherein the first and the second dielectric layers comprise parylene.  
     
     
         19 . A method of forming a dual damascene structure, comprising: 
 depositing a first dielectric film on a substrate;    depositing an etch stop on the first dielectric film;    pattern etching the etch stop to define a vertical interconnect opening and expose the first dielectric film;    depositing a second dielectric film on the etch stop and the exposed first dielectric film by reacting an organo silane with an oxidizing gas; and    pattern etching the second dielectric film to define a horizontal interconnect and continuing to etch the exposed first dielectric film to define the vertical interconnect.    
     
     
         20 . The method of  claim 19  wherein the first dielectric film is produced by reacting the organo silane with the oxidizing gas.  
     
     
         21 . A dual damascene structure, comprising: 
 a first low k dielectric layer defining one or more vertical interconnects;    a patterned etch stop overlying the first low k dielectric layer and defining the one or more vertical interconnects; and    a second dielectric layer overlying the patterned etch stop and defining one or more horizontal interconnects, the second dielectric layer comprising an oxidized organo silane.    
     
     
         22 . The structure of  claim 21  wherein the first dielectric layer comprises the oxidized organo silane.  
     
     
         23 . An integrated circuit structure, comprising: 
 a premetal dielectric layer;    a low k dielectric adhesive layer having a thickness from 50 to 200 Å overlying the premetal dielectric layer, the adhesive layer comprising an oxidized organo silane compound; and    an intermetal dielectric layer overlying the low k dielectric adhesive layer.    
     
     
         24 . The structure of  claim 23 , further comprising a silicon oxide or silicon nitride etch stop overlying the intermetal dielectric layer.  
     
     
         25 . A dual damascene structure, comprising: 
 a dielectric layer defining one or more vertical interconnects;    a first adhesive layer having a thickness from about 50 to about 200 Å overlying the first dielectric layer and defining the one or more vertical interconnects, the first adhesive layer comprising an oxidized organo silane film;    a silicon oxide or silicon nitride etch stop overlying the first adhesive layer and defining the one or more vertical interconnects;    a second adhesive layer having a thickness from about 50 to about 200 Å overlying the etch stop and defining one or more horizontal interconnects, the second adhesive layer comprising an oxidized organo silane film; and    a second dielectric layer overlying the second adhesive layer and defining the one or more horizontal interconnects.    
     
     
         26 . The structure of  claim 25  wherein the first dielectric layer and the second dielectric layer comprise a low k dielectric material.