Insulated-gate semiconductor element and method for manufacturing the same

Abstract

An insulated-gate semiconductor element with a trench structure is provided, which has a high breakdown voltage even though a silicon carbide substrate is used that is preferable to obtain a semiconductor element with favorable properties. The surface of a silicon carbide substrate is etched to form a concave portion. Then, a particle beam, for example an ion beam, is irradiated from above, and a defect layer is formed at least in a bottom surface of the concave portion. The substrate is heated in an oxidation atmosphere, and an oxide film is formed at least on a side surface and the bottom surface of the concave portion. Then, a gate electrode is formed on the oxide film. With this method, the oxide film at the bottom surface of the concave portion is thicker than the oxide film at the side surfaces of the concave portion, so that a high breakdown voltage can be ensured, even when the surface of the silicon carbide layer is a face with which a superior epitaxial layer can be attained, such as the (111) Si-face of β-SiC or the (0001) Si-face of α-SiC.

What is claimed is:  
     
         1 . A method for manufacturing an insulated-gate semiconductor element, comprising: 
 etching a surface of a silicon carbide substrate to form a concave portion on the surface;    irradiating a particle beam from above the surface to form a defect layer in at least a bottom surface of the concave portion;    heating the silicon carbide substrate in an oxidation atmosphere to form an oxide film of silicon carbide on at least a side surface of the concave portion and the bottom surface in which the defect layer has been formed; and    forming a gate electrode on the oxide film.    
     
     
         2 . The method of    claim 1   , wherein the surface of the silicon carbide substrate is a (111) Si-face of β-SiC or a (0001) Si-face of α-SiC.  
     
     
         3 . The method of    claim 1   , wherein the silicon carbide substrate includes a multi-layer structure of a silicon carbide substrate of a first conductivity type, a first layer of the first conductivity type formed on the silicon carbide substrate of the first conductivity type, and a second layer of a second conductivity type formed on the first layer of the first conductivity type.  
     
     
         4 . The method of    claim 1   , wherein the concave portion is formed so that the side surface of the concave portion and the surface of the silicon carbide substrate define an angle between 80° and 120°.  
     
     
         5 . The method of    claim 1   , further comprising, after forming the concave portion and before irradiating the particle beam: 
 forming an epitaxial layer on at least the side surface of the concave portion.    
     
     
         6 . The method of    claim 1   , wherein the particle beam is an ion beam.  
     
     
         7 . The method of    claim 6   , wherein the ion beam is at least one ion beam selected from the group consisting of silicon, oxygen, nitrogen, hydrogen and inert gas ion beams.  
     
     
         8 . The method of    claim 6   , wherein the energy of the ion beam is between 1 keV and 10 MeV.  
     
     
         9 . The method of    claim 6   , wherein the ion implant dose is at least 10 14  cm −2 .  
     
     
         10 . The method of    claim 1   , wherein the particle beam includes at least two beams of different energies.  
     
     
         11 . The method of    claim 1   , wherein the particle beam is irradiated while keeping the silicon carbide substrate at a temperature of not more than 500° C.  
     
     
         12 . A insulated-gate semiconductor element, comprising: 
 a silicon carbide substrate having a surface of a (111) Si-face of β-SiC or a (0001) Si-face of α-SiC;    a concave portion formed on the surface;    an oxide film of silicon carbide formed at least on a bottom surface and a side surface of the concave portion;    a gate electrode formed on the oxide film;    wherein the oxide film formed on the bottom surface is thicker than the oxide film formed on the side surface.    
     
     
         13 . The insulated-gate semiconductor element of    claim 12   , wherein the side surface of the concave portion and the surface of the silicon carbide substrate define an angle between 80° and 120°.  
     
     
         14 . The insulated-gate semiconductor element of    claim 12   , having a breakdown voltage of at least 400 V.  
     
     
         15 . The insulated-gate semiconductor element of    claim 12   , wherein the silicon carbide substrate includes a multi-layer structure of a silicon carbide substrate of a first conductivity type, a first layer of the first conductivity type formed on the silicon carbide substrate of the first conductivity type, and a second layer of a second conductivity type formed on the first layer of the first conductivity type.  
     
     
         16 . The insulated-gate semiconductor element of    claim 12   , further comprising an epitaxial layer formed between the concave portion and the oxide film.