US2001036712A1PendingUtilityA1

A method of producing a semiconductor device having a source drain region of small junction depth

Priority: Sep 29, 1995Filed: May 14, 1999Published: Nov 1, 2001
Est. expirySep 29, 2015(expired)· nominal 20-yr term from priority
Inventors:Toru Yamazaki
H10D 64/025H10D 62/364H10D 30/0278H10D 30/0275H10D 30/021H10D 10/891H10D 10/421H10D 10/054H10D 10/021H10D 62/151
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Claims

Abstract

A semiconductor device which does not allow production of leak current or a drop of the Early voltage and includes a diffused layer having a reduced depth. A silicon layer containing an impurity of a second conduction type is formed on a semiconductor substrate of a first conduction type, and a spacer layer formed from a single crystalline silicon layer containing germanium is provided under the silicon layer.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A semiconductor device wherein, on a semiconductor substrate of a first conduction type, a silicon layer containing an impurity of a second conduction type is formed, comprising: 
 a spacer layer provided under said silicon layer and formed from a single crystal silicon layer containing germanium.    
     
     
         2 . A semiconductor device as claimed in    claim 1   , wherein 
 the concentration of the impurity of the second conduction type contained at least in part of said silicon layer is equal to or higher than 1×10 18  cm −3 , and the content of germanium in said spacer layer is 10% to 15%.    
     
     
         3 . A semiconductor device as claimed in    claim 1   , wherein 
 the concentration distribution of germanium in said spacer layer is an inclined concentration distribution wherein the concentration is lower on the silicon layer side than on the semiconductor substrate side.    
     
     
         4 . A semiconductor device as claimed in any one of    claims 1    to    3   , wherein 
 a source drain layer of a MOS transistor is formed in said silicon layer.  
 
     
     
         5 . A semiconductor device as claimed in any one of    claims 1    to    3   , wherein 
 said silicon layer is an active base layer of a bipolar transistor.  
 
     
     
         6 . A method of producing a semiconductor device wherein, on a semiconductor substrate of a first conduction type, a silicon layer containing an impurity of a second conduction type is formed, wherein 
 a spacer layer formed from a single crystal silicon layer containing germanium and a silicon layer are successively formed on the semiconductor substrate of the first conduction type, and then a diffused region of the impurity of the second conduction type is formed in the silicon layer by ion implantation.    
     
     
         7 . A method of producing a semiconductor device wherein, on a semiconductor substrate of a first conduction type, a silicon layer containing an impurity of a second conduction type is formed, comprising: 
 the first step of successively forming a spacer layer formed from a single crystal silicon layer containing germanium and a silicon layer on the semiconductor substrate of the first conduction type;    the second step of forming a gate oxide film of a predetermined thickness at a portion of the silicon layer formed by the first step which makes an active region;    the third step of forming a gate electrode of a predetermined pattern on the gate oxide film formed by the second step; and    the fourth step of implanting ions of an impurity of the second conduction type using the gate electrode formed by the third step as a mask for ion implantation and performing annealing in a nitrogen atmosphere of a predetermined temperature to form a source drain region in the silicon layer.    
     
     
         8 . A method of producing a semiconductor device wherein, on a semiconductor substrate of a first conduction type, a silicon layer containing an impurity of a second conduction type is formed, comprising: 
 the first step of successively forming, on the semiconductor substrate of the first conduction type, a buried layer of the second conduction type and a collector layer of the second conduction type;    the second step of forming a first oxide film of a predetermined thickness on the collector layer of the second conduction type formed by the first step, implanting ions of an impurity of the second conduction type into a predetermined region in the collector layer of the second conduction type and performing annealing in a nitrogen atmosphere of a predetermined temperature to form a collector leading out diffused layer;    the third step of removing the oxide film in a base region from within the first oxide film formed by the second step and successively forming a spacer layer formed from a single crystal silicon layer containing germanium and a silicon layer on the base region of the collector layer of the second conduction type whose surface is exposed;    the fourth step of successively forming a polycrystalline silicon layer of the first conduction type and a second oxide film of a predetermined thickness over the entire area and patterning the polycrystalline silicon layer of the first conduction type and the second oxide film into a predetermined shape to form a base leading out electrode;    the fifth step of forming a polycrystalline silicon layer of a predetermined thickness containing an impurity of the second conduction type over the entire area and patterning the polycrystalline silicon layer into a predetermined shape to form an emitter electrode; and    the sixth step of diffusing an impurity of the first conduction type into the silicon layer to form an external base diffused layer and diffusing an impurity of the second conduction type into the silicon layer to form an emitter diffused layer in the active base layer.

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