CMOS sense structure having silicon dioxide outer ring around sense region

Abstract

A CMOS structure having a silicon dioxide outer ring around the sense region. The CMOS sense structure has a substrate, a n − region, a n + region, an isolation region, a field implant region and a silicon dioxide outer ring region. The n − region is formed in the substrate, and the n + region is formed within the n − region. The isolation region is formed in the substrate next to the edge of the n − region. The field implant region is formed under the isolation region. The silicon dioxide outer ring region is formed over the n − region, a portion of the isolation region and a portion of the n + region. The silicon dioxide outer ring can prevent surface leakage that is caused by etching and lengthening the distance from the n − region to the field implant region so that edge junction leakage is reduced.

What is claimed is:  
     
         1 . A CMOS sense structure having a silicon dioxide outer ring around the sense region, comprising: 
 a substrate;    a n −  region in the substrate;    a n +  region within the n −  region of the substrate;    an isolation region in the substrate in contact with the edge of the n −  region;    a field implant region under the isolation region; and    a silicon dioxide outer ring over the n −  region, a portion of the isolation region and a portion of the n +  region.    
     
     
         2 . The structure of    claim 1   , wherein material forming the isolation region includes silicon dioxide.  
     
     
         3 . The structure of    claim 1   , wherein the field implant region includes a P-type ion implant region.  
     
     
         4 . A method of forming a CMOS sense structure having a silicon dioxide outer ring thereon, comprising the steps of: 
 providing a substrate having a device region, a plurality of isolation regions and a CMOS sense region, wherein one side of the isolation region is in contact with the device region and the other side of the isolation region is in contact with the CMOS sense region, a field implant region is under each isolation region, and the silicon dioxide outer ring is over the isolation region and the edge junction of the CMOS sense region; and    conducting a n +  and a n −  implant sequentially to implant ions into the CMOS sense region.    
     
     
         5 . The method of    claim 4   , wherein material for forming the isolation region includes silicon dioxide.  
     
     
         6 . The method of    claim 4   , wherein the step of forming the field implant regions under the isolation region include implanting P-type ions into the substrate.