US2001027552A1PendingUtilityA1
CD-ROM decoder
Priority: Mar 28, 2000Filed: Mar 27, 2001Published: Oct 4, 2001
Est. expiryMar 28, 2020(expired)· nominal 20-yr term from priority
G11B 20/10G11B 20/18G11B 20/10527G11B 20/12
38
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Claims
Abstract
A CD-ROM decoder that reduces the load on a microcomputer temporarily stores in a buffer memory in sector units digital data having a predetermined number of bytes and a predetermined format. The CD-ROM decoder also processes the digital data by selectively correcting and detecting code errors included in the digital data. A sector information conversion circuit identifies a mode of a sector of the digital data based on header information and compares former four bytes and latter four bytes of sub-header information to identify a form of the sector of the digital data.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A CD-ROM decoder for temporarily storing in a buffer memory in sector units digital data having a predetermined number of bytes and a predetermined format, processing the digital data by correcting and detecting code errors included in the digital data, and transferring the processed digital data, wherein the digital data includes header information related with a mode of a sector and sub-header information related with a form of the sector, the sub-header information including a first code and a second code following the first code, the CD-ROM decoder comprising:
an error flag register for receiving an error flag when an error in the digital data was not corrected during the code error correction process; a header information register for storing the header information and the sub-header information; and a sector information conversion circuit connected to the error flag register and the header information register for deciding the format of the digital data in each sector based on the error flag, the header information, and the sub-header information and generating sector information indicating the decided format, the sector information conversion circuit temporarily storing the sector information and the digital data in the buffer memory, wherein the sector information conversion circuit decides the mode of the sector of the digital data based on the header information and compares the first code and the second code to decide the form of the sector of the digital data.
2 . The CD-ROM decoder according to claim 1 , wherein the sector information conversion circuit refers to the sub-header information to decide the form when the first and second codes match.
3 . The CD-ROM decoder according to claim 2 , wherein the first code and the second code each include a plurality of sub-header codes, one of the sub-header codes being information indicating the form of the sector of the digital data, and the error flag being set to correspond with the sub-header codes, and wherein the sector information conversion circuit compares the first code and the second code and refers to the sub-header codes to decide the format when the error flag is set.
4 . The CD-ROM decoder according to claim 1 , wherein the first code and the second code each have a predetermined number of bytes, and wherein when one of the bytes of the first and second codes includes an error, the sector information conversion circuit corrects the byte that includes the error with a corresponding byte of the other one of the codes.
5 . The CD-ROM decoder according to claim 1 , wherein the format includes mode 2 formless, mode 2 form 1, and mode 2 form 2, the first code includes four bytes, and the second code includes four bytes, each corresponding to one of the four bytes of the first code, wherein the sector information conversion circuit compares the four bytes of the first code with the corresponding four bytes of the second code, decides that the format of the sector is either mode 2 form 1 or mode 2 form 2 when the first and second codes match, decides that the format is mode 2 formless when the first and second codes do not match, and decides the format when an error is included in any one of the bytes of the first and second codes by comparing the first and second codes errors at bytes excluding the one including the error and the byte corresponding to the one including the error.Join the waitlist — get patent alerts
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