Method and materials for integration of fluorine-containing low-k dielectrics

Abstract

Metal and insulator interconnect structures are described incorporating one or more layers of fluorinated dielectric insulation, one or more conductive wiring levels interconnected by vias and capping and/or liner materials to physically isolate the wiring levels and vias from the fluorinated dielectric such as fluorinated diamond like carbon which has a low dielectric constant. The invention overcomes the problem that can arise when fluorine in the fluorinated dielectric insulation reacts with other materials in the interconnect structure to produce unwanted fluorine-containing compounds that can interfere with the structure's mechanical integrity or interconnect function.

1 . An interconnect structure comprising one or more layers of fluorinated dielectric insulation and one or more layers of conductive wiring patterns electrically connected by conductive vias, said conductive wiring patterns and vias completely isolated from said fluorinated dielectric insulation by at least one fluorine-resistant capping material selected from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their oxides, fluorides, nitrides, and silicides, mixtures thereof, Si-containing DLC and Si-O-containing DLC.  
     
     
         2 . The interconnect structure of    claim 1    wherein said one or more layers of fluorinated dielectric insulation is selected from the group consisting of fluorinated diamond like carbon (FDLC), fluorinated amorphous carbon (FLAC), FDLC or FLAC with additives selected from the group containing H, Si, Ge, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics, and organic halogen-containing dielectrics.  
     
     
         3 . An interconnect structure comprising one or more layers of fluorinated dielectric insulation and one or more layers of conductive wiring patterns electrically connected by conductive vias, said conductive wiring pattern levels and vias isolated from the fluorinated dielectric on a first set of selected surfaces by at least one electrically insulating fluorine-resistant capping material, and isolated from the fluorinated dielectric on a second set of selected surfaces by at least one-electrically conductive fluorine-resistant capping and/or liner material.  
     
     
         4 . The interconnect structure of    claim 3    wherein said one or more layers of fluorinated dielectric insulation is selected from the group consisting of fluorinated diamond like carbon (FDLC), fluorinated amorphous carbon, FDLC or FLAC with additives selected from the group containing H, Si, Ge, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics, and organic halogen-containing dielectrics.  
     
     
         5 . The interconnect structure of    claim 3    wherein said electrically conductive fluorine-resistant capping and/or liner material and the said electrically insulating fluorine-resistant capping material is selected from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their oxides, fluorides, nitrides and silicides, mixtures thereof, Si-containing DLC and Si-O-containing DLC.  
     
     
         6 . The interconnect structure of    claim 3    wherein said electrically conductive fluorine-resistant capping and/or liner material is selected from the group consisting of Al, Cr, Co, Cu, and cobalt silicide (CoSi 2 ).  
     
     
         7 . The interconnect structure of    claim 3    wherein said electrically insulating fluorine-resistant capping material is selected from the group consisting of aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), Si-containing DLC and Si-O-containing DLC.  
     
     
         8 . An interconnect structure comprising one or more layers of fluorinated dielectric insulation and one or more layers of conductive wiring patterns electrically connected by conductive vias, said conductive wiring pattern and vias isolated from said fluorinated dielectric insulation on a first set of selected surfaces by at least one electrically insulating fluorine-resistant capping material, and isolated from said fluorinated dielectric on a second set of selected surfaces by at least one fluorine-resistant sidewall capping material in combination with a conductive liner material.  
     
     
         9 . The interconnect structure of    claim 8    wherein said one or more layers of fluorinated dielectric insulation is selected from the group consisting of fluorinated diamond like carbon (FDLC), fluorinate amorphous carbon (FLAC), FDLC or FLAC with additives selected from the group containing H, Si, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics, and organic halogen-containing dielectrics.  
     
     
         10 . The interconnect structure of    claim 8    wherein said electrically insulating fluorine-resistant capping material is selected from the group consisting of insulating oxides, nitrides, or fluorides of the elements Ag, Al, Co, Cr, In, Ir, Mg, Mn, Sn, mixtures and multilayers thereof, Si-containing DLC and Si-O-containing DLC.  
     
     
         11 . The interconnect structure of    claim 8    wherein said electrically insulating fluorine-resistant capping material is selected from the group consisting of aluminum oxide (Al2O3), magnesium oxide (MgO), Si-containing DLC and Si-O-containing DLC.  
     
     
         12 . The interconnect structure of    claim 8    wherein said fluorine-resistant sidewall capping material is selected from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their oxides, fluorides, nitrides and silicides, mixtures thereof, Si-containing DLC and Si-O-containing DLC.  
     
     
         13 . The interconnect structure of    claim 8    wherein said fluorine-resistant sidewall capping material is selected from the group consisting of aluminum oxide (Al 2 O 3 ), magnesium oxide (MgO), Al, Cr, Co, Cu, Si-containing DLC and Si-O-containing DLC.  
     
     
         14 . The interconnect structure of    claim 8    wherein said conductive liner material is selected from the group consisting of TaN, TaSiN, ZrN, ZrSiN, HfN, HfSiN, TiN, TiSiN, WN, WSiN and combinations thereof.  
     
     
         15 . A method for forming an interconnect structure comprising one or more layers of fluorinated dielectric insulation and one or more layers of conductive wiring patterns electrically connected by conductive vias, comprising the steps of 
 selecting a substrate containing regions that are conductive and regions that are not conductive, depositing on said substrate a blanket coating of a first capping material, said first capping material selected to be insulating and fluorine-resistant,    depositing on said first capping material a blanket layer of fluorinated dielectric,    depositing at least one layer of masking material on said fluorinated dielectric,    patterning said deposited masking material and said fluorinated dielectric to form cavities in selected regions of said fluorinated dielectric to provide at least some exposed regions of said first capping material,    removing said exposed regions of first capping material to expose underlying regions of said substrate,    selecting a first conductive material identified as fluorine-resistant,    providing a conformal coating of said first conductive material to line said cavities,    overfilling said cavities with a second conductive material,    removing overfill of said second conductive material by a planarizing process,    removing residuals of said first conductive material from regions above said top surface of said first dielectric, and    repeating these process steps until the desired number of wiring and via levels have been fabricated.    
     
     
         16 . The method of    claim 15    wherein said step of depositing at least one layer of masking material includes the step of selecting insulating and fluorine-resistant masking material.  
     
     
         17 . The method of    claim 15    further including the step of removing said masking material after said step of removing said exposed regions of first capping material.  
     
     
         18 . The method of    claim 15    further including the step of removing said masking material after said step of removing residuals of said first conductive material.  
     
     
         19 . A method for forming an interconnect structure comprising one or more layers of fluorinated dielectric insulation and one or more layers of conductive wiring patterns electrically connected by conductive vias, comprising the steps of 
 selecting a substrate containing regions that are conductive and regions that are not conductive,    depositing on said substrate a blanket layer of a first capping material, said first capping material selected to be insulating and fluorine-resistant,    depositing on said first capping material a blanket first layer of a fluorinated dielectric material,    depositing on said first layer of said fluorinated dielectric material a blanket layer of a second capping material, said second capping material selected to be insulating and fluorine-resistant,    depositing on said layer of second capping material a blanket second layer of a fluorinated dielectric material,    depositing at least one layer of masking material,    patterning said deposited masking material, said second layer of fluorinated dielectric, said second capping material, and    said first layer of fluorinated dielectric to form cavities in selected regions of said first and second fluorinated dielectric layers to provide at least some exposed regions of said first capping material,    removing said exposed regions of first capping material to expose underlying regions of said substrate,    selecting a first conductive material identified as fluorine-resistant,    providing a blanket coating of said first conductive material to line said cavities,    overfilling said cavities with a second conductive material,    removing overfill of said second conductive material by a planarizing process,    removing residuals of said first conductive material from regions above said top surface of said first dielectric,    and repeating these process steps until the desired number of wiring and via levels have been fabricated.    
     
     
         20 . The method of    claim 19    wherein said step of depositing at least one layer of masking material includes the step of selecting insulating and fluorine-resistant masking material.  
     
     
         21 . The method of    claim 19    further including the step of removing exposed regions of said second capping material previously covered by said second fluorinated dielectric layer.  
     
     
         22 . The method of    claim 19    further including the step of removing said masking material after said step of removing said exposed regions of first capping material.  
     
     
         23 . The method of    claim 19    further including the step of removing said masking material after said step of removing residuals of said first conductive material.  
     
     
         24 . The method of    claim 19    further including the steps of 
 forming sidewall spacers on the sidewalls of said cavities prior to providing a blanket coating of said first conductive material, said sidewall spacers consisting of material selected from the group consisting of fluorine-resistant materials,  
 and the substitution of the step of  
 selecting a first conductive material identified as fluorine-resistant,  
 with the step of  
 selecting a first conductive material not required to be fluorine-resistant including a refractory nitride.  
 
     
     
         25 . The method of    claim 15    wherein said step of depositing on said first capping material further includes the step of selecting a fluorinated dielectric from the group consisting of fluorinated diamond like carbon (FDLC), fluorinated amorphous carbon (FLAC), FDLC or FLAC with additives selected from the group containing H, Si, Ge, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics and organic halogen-containing dielectrics.  
     
     
         26 . The method of    claim 15    wherein said step of selecting a first conductive material further includes the step of selecting from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their conductive oxides, fluorides, nitrides and silicides and mixtures thereof.  
     
     
         27 . The method of    claim 19    wherein said step of depositing on said first capping material further includes the step of selecting a fluorinated dielectric from the group consisting of fluorinated diamond like carbon (FDLC), fluorinated amorphous carbon (FLAC), FDLC or FLAC with additives selected from the group consisting of H, Si, Ge, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics and organic halogen-containing dielectrics.  
     
     
         28 . The method of    claim 19    wherein said step of selecting a first conductive material further includes the step of selecting from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their conductive oxides, fluorides, nitrides and silicides, mixtures thereof, Si-containing DLC and Si-O-containing DLC.  
     
     
         29 . The method of    claim 24    wherein said step of depositing on said first capping material further includes the step of selecting a fluorinated dielectric from the group consisting of fluorinated diamond like carbon (FDLC), fluorinated amorphous carbon (FLAC), FDLC or FLAC with additives selected from the group containing H, Si, Ge, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics and organic halogen-containing dielectrics.  
     
     
         30 . The method of    claim 24    wherein said step of selecting material of said sidewall spacers further includes the step of selecting from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their oxides, fluorides, nitrides and silicides, mixtures thereof, and amorphous silicon-containing carbon based materials such as Si-containing DLC and Si-O-containing DLC.  
     
     
         31 . The method of    claim 24    wherein said step of selecting a first conductive material not required to be fluorine-resistant further includes the step of selecting a material from the group consisting of TaN, TaSiN, ZrN, ZrSiN, HfN, HfSiN, TiN, TiSiN, WN, WSiN and combinations thereof.  
     
     
         32 . The method of    claim 15    wherein said step of selecting a first conductive material further includes the step of selecting a conductive material from the group consisting of refractory metals W and Ta, and the metal refractory nitrides and metal silicon nitrides including TaN, TaSiN, TiN, TiSiN and combinations thereof and forming a layer of said conductive material over said first conductive material selected from the group consisting of Ag, Al, Al-Cu, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their conductive oxides, fluorides, nitrides and silicides and mixtures thereof.  
     
     
         33 . The method of    claim 19    wherein said step of selecting a first conductive material further includes the step of selecting a conductive material from the group consisting of refractory metals W and Ta, and the metal refractory nitrides and metal silicon nitrides including TaN, TaSiN, ZrN, ZrSiN, HfN, HfSiN, TiN, TiSiN, WN, WSiN, and combinations thereof and forming a layer of said conductive material over said first conductive material selected from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their conductive oxides, fluorides, nitrides and suicides and mixtures thereof.  
     
     
         34 . An interconnect structure comprising one or more layers of fluorinated dielectric insulation and one or more layers of conductive wiring patterns electrically connected by conductive vias, said conductive wiring pattern and vias isolated from said fluorinated dielectric insulation on a first set of selected surfaces by at least one electrically insulating fluorine-resistant capping material, and isolated from said fluorinated dielectric on a second set of selected surfaces by at least one conductive fluorine-resistant resistant liner material in combination with a conductive liner material to provide a diffusion barrier to metal atoms in said conductive wiring patterns and vias.  
     
     
         35 . The interconnect structure of    claim 34    wherein said one or more layers of fluorinated dielectric insulation is selected from the group consisting of fluorinated diamond like carbon (FDLC), fluorinated amorphous carbon (FLAC), FDLC or FLAC with additives selected from the group containing H, Si, Ge, O, and N, fluorinated silicon glass (FSG), inorganic halogen-containing dielectrics and inorganic halogen-containing dielectrics.  
     
     
         36 . The interconnect structure of    claim 34    wherein said electrically insulating fluorine-resistant capping material is selected from the group consisting of insulating oxides, nitrides, or fluorides of the elements Ag, Al, Al-Cu, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Sn, mixtures and multilayers thereof, Si-containing DLC and Si-O-containing DLC.  
     
     
         37 . The interconnect structure of    claim 34    wherein said electrically insulating fluorine-resistant capping material is selected from the group consisting of aluminum oxide (Al2O3), magnesium oxide (MgO), Si-containing DLC and Si-O-containing DLC.  
     
     
         38 . The interconnect structure of    claim 34    wherein said conductive fluorine-resistant liner material is selected from the group consisting of Ag, Al, Al-Ti, Co, Cr, Cu, In, Ir, Mg, Mn, Pd, Pt, Sn, their conductive oxides, fluorides, nitrides and silicides and mixtures thereof.  
     
     
         39 . The interconnect structure of    claim 34    wherein said conductive fluorine-resistant liner material is selected from the group consisting of Al, Cr, Co, Cu, and cobalt silicide (CoSi 2 ).  
     
     
         40 . The interconnect structure of    claim 34    wherein said conductive liner material is selected from the group consisting of refractory metals W and Ta, and refractory metal nitrides and metal silicon nitrides including TaN, TaSiN, ZrN, ZrSiN, HfN, HfSiN, TiN, TiSiN, WN, and WSiN and layered combinations thereof.