Step-like silicon on isolation structure

Abstract

A step-like silicon on isolation (SOI) structure has a substrate, wherein isolation structures are located within the substrate and an active region is located between the isolation structures; a pair of source/drain regions formed within the active region; a channel region located between the source/drain regions and within the substrate; a gate structure located on the channel region and above the substrate; and a buried insulator layer located below the source/drain regions and the channel region, wherein the buried insulator layer is substantially conformal to the source/drain regions and the channel region and has a step-like profile.

What is claimed is:  
     
         1 . A step-like silicon on isolation (SOI) structure, comprising: 
 a substrate, wherein isolation structures are located within the substrate and an active region is located between the isolation structures;    a pair of source/drain regions formed within the active region;    a channel region located between the source/drain regions and within the substrate;    a gate structure located on the channel region and above the substrate; and    a buried insulator layer located below the source/drain regions and the channel region, wherein the buried insulator layer is substantially conformal to the source/drain regions and the channel region and has a step-like profile.    
     
     
         2 . The structure of    claim 1   , wherein the buried insulator layer is formed by implanting ions through the gate structure and the source/drain regions and then by an annealing process to have the step-like profile.  
     
     
         3 . The structure of    claim 1   , wherein the gate structure further comprises a gate dielectric layer, a gate electrode and a spacer covering sidewalls of the gate dielectric layer and the gate electrode.  
     
     
         4 . The structure of    claim 3   , further comprising a pair of light doped drain regions adjacent to the source/drain regions and below the spacer.  
     
     
         5 . The structure of    claim 2   , the ions formed the buried insulator layer comprises oxygen or nitrogen ions.  
     
     
         6 . The structure of    claim 2   , wherein the annealing process is selected from a group consisting of a laser annealing, a rapid thermal process and a furnace process.  
     
     
         7 . The structure of    claim 1   , wherein the isolation structures comprise a shallow trench isolation (STI) structure.  
     
     
         8 . A step-like silicon on isolation (SOI) structure, comprising: 
 a substrate, wherein the substrate has an active region therein, an isolation surrounds the active region and a pair of source/drain regions is located within the active region;    a gate structure located above the substrate and between the source/drain regions;    a buried insulator layer located below the source/drain regions and the gate structure, wherein the buried insulator has a step-like profile and a channel region is located within the substrate and surrounded by the source/drain regions, the gate structure and the buried insulator layer.    
     
     
         9 . The structure of    claim 8   , wherein the buried insulator layer is formed by implanting ions through the gate structure and the source/drain regions and then by an annealing process to have the step-like profile.  
     
     
         10 . The structure of    claim 8   , wherein the gate structure further comprises a gate dielectric layer, a gate electrode and a spacer covering sidewalls of the gate dielectric layer and the gate electrode.  
     
     
         11 . The structure of    claim 10   , further comprising a pair of light doped drain regions adjacent to the source/drain regions and below the spacer.  
     
     
         12 . The structure of    claim 8   , wherein the isolation structures comprise a shallow trench isolation (STI) structure.