US2001019155A1PendingUtilityA1

Semiconductor device and method of manufacturing semiconductor device

Priority: Mar 17, 1994Filed: Jun 16, 1998Published: Sep 6, 2001
Est. expiryMar 17, 2014(expired)· nominal 20-yr term from priority
H10D 86/201H10D 30/6744H10D 30/6725H10D 30/6706H10D 86/01
29
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The present invention relates to a method of manufacturing a semiconductor device for forming an insulated gate field effect transistor in a completely isolated SOI layer, and has for its object to prevent depletion or inversion surely by introducing impurities of sufficiently high concentration into an SOI layer adjacent to an isolating film filled up between element regions of the SOI layer and a backing insulating layer and to aim at flattening of the SOI substrate surface, and further, includes the steps of implanting impurity ions into a semiconductor layer from an oblique direction so as to reach the semiconductor layer under an oxidation-preventive mask using the oxidation-preventive mask as a mask for ion implantation, heating the semiconductor layer in an oxidizing atmosphere with the oxidation-preventive mask so as to form a local oxide film to isolate the semiconductor layer, and also forming a impurity region with impurities implanted into the semiconductor layer in a region adjacent to the local oxide film and to at least an insulating layer under the semiconductor layer.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A semiconductor device comprising: 
 an insulating layer formed on a first semiconductor layer;    a second semiconductor layer having a protrusion of which a film thickness gets thinner as approaching to an edge of the protrusion on said insulating layer;    an isolating film formed in contact with the protrusion of said second semiconductor layer, said isolating film having a film thickness thicker than the film thickness of said insulating layer; and    a gate electrode/interconnection formed through a gate insulating film on said second semiconductor layer, extending at least on the protrusion.    
     
     
         2 . The semiconductor device according to    claim 1   , wherein an isolating film, which has a film thickness thicker than that of said insulating layer and is in contact with the protrusion of said second semiconductor layer, exists in an outer peripheral portion of said protrusion.  
     
     
         3 . A method of manufacturing a semiconductor device comprising the steps of: 
 forming a first semiconductor layer and a second semiconductor layer putting an insulating layer therebetween;    forming an oxidation-preventive mask on said second semiconductor layer;    oxidizing said second semiconductor layer locally with said oxidation-preventive mask to form a local oxide film that reaches said insulating layer so as to form a protrusion of said second semiconductor layer at the side portion of said second semiconductor layer;    removing said local oxide film on said protrusion; and    forming a gate insulating film and gate electrode/interconnection one after another on said second semiconductor layer, in order that said gate electrode/interconnection is extending on the protrusion.    
     
     
         4 . The method of manufacturing a semiconductor device according to    claim 3   , wherein said step of removing said local oxide film on said protrusion results in leaving, in an outer peripheral portion of said protrusion, an insulating film which has a film thickness thicker than that of said insulating layer.  
     
     
         5 . The method of manufacturing a semiconductor device according to    claim 3   , wherein said second semiconductor layer is a silicon layer.  
     
     
         6 . The method of manufacturing a semiconductor device according to    claim 3   , wherein the substrate composed of said first semiconductor layer, said insulating layer and said second semiconductor layer is formed using one selected from the group consisting of a SIMOX method, a laminating method and an epitaxial lateral overgrowth method.  
     
     
         7 . A semiconductor device comprising: 
 a semiconductor layer formed on an insulating layer;    an isolating film formed on said insulating layer so as to be adjacent to said semiconductor layer, which is getting thicker in thickness as approaching to said insulating layer from the surface of said semiconductor layer; and    an impurity region located in said semiconductor layer under said isolating film, said impurity region having a peak of impurity concentration in said semiconductor layer within a range of 20 nm or more from a contact point between said insulating layer and said isolating film.    
     
     
         8 . The semiconductor device according to    claim 7   , wherein the periphery of the side end of said semiconductor layer is surrounded by said isolating film.  
     
     
         9 . The semiconductor device according to    claim 7   , wherein source/drain regions of an insulated gate field effect transistor are formed in said semiconductor layer, and said impurity region exists in a region between said source/drain regions.  
     
     
         10 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming an oxidation-preventive mask on a semiconductor layer on an insulating layer;    implanting impurity ions into said semiconductor layer from an oblique direction so as to reach said semiconductor layer under said oxidation-preventive mask using said oxidation-preventive mask as a mask for ion implantation;    forming a local oxide film reaching said insulating layer by heating said semiconductor layer in an oxidizing atmosphere with said oxidation-preventive mask to form an element region composed of said isolated semiconductor layer; and    forming an impurity region by said impurities implanted into said semiconductor layer adjacent to said local oxide film.    
     
     
         11 . The method of manufacturing a semiconductor device according to    claim 10   , wherein the angle in said oblique direction is within a range of 30 degrees or less with respect to a perpendicular direction to the surface of said semiconductor layer, and said impurity region has the peak of impurity concentration in said semiconductor layer within a range of 20 nm or more and 50 nm or less from the contact point between said insulating layer and said local oxide film.  
     
     
         12 . The method of manufacturing a semiconductor device according to    claim 10   , wherein the periphery on the side end of said semiconductor layer is surrounded by said local oxide film.  
     
     
         13 . The method of manufacturing a semiconductor device according to    claim 10   , wherein, after forming an element region composed of said semiconductor layer, source/drain regions of an insulated gate field effect transistor are formed in said semiconductor layer with said impurity region being put therebetween.  
     
     
         14 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming an oxidation-preventive mask on a semiconductor layer;    implanting impurity ions into said semiconductor layer from an oblique direction so as to reach said semiconductor layer under said oxidation-preventive mask using said oxidation-preventive mask as a mask for ion implantation;    forming a local oxide film by heating said semiconductor layer in an oxidizing atmosphere with said oxidation-preventive mask to form an impurity region in said semiconductor layer adjacent to said local oxide film with said implanted impurities;    forming an insulating film covering said semiconductor layer on the side where said local oxide film is formed after removing said oxidation-preventive mask; and    polishing said semiconductor layer from the back of said semiconductor layer so as to expose said local oxide film to form an element region composed of said isolated semiconductor layer.    
     
     
         15 . The method of manufacturing a semiconductor device according to    claim 14   , wherein the periphery on the side end of said semiconductor layer is surrounded by said local oxide film.  
     
     
         16 . The method of manufacturing a semiconductor device according to    claim 14   , wherein, after forming an element region composed of said semiconductor layer, source/drain regions of an insulated gate field effect transistor are formed in said semiconductor layer with said impurity region being put therebetween.  
     
     
         17 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming an etching-proof mask on a semiconductor layer;    implanting impurity ions into said semiconductor layer from an oblique direction so as to reach said semiconductor layer under said etching-proof mask using said etching-proof mask as a mask for ion implantation;    etching said semiconductor layer with said etching-proof mask;    forming an insulating film covering said semiconductor layer on the etched side after removing said etching-proof mask; and    polishing said semiconductor layer from a surface on an opposite side to the surface of forming said insulating film so as to expose said insulating film, and forming element regions composed of said isolated semiconductor layer.    
     
     
         18 . The method of manufacturing a semiconductor device according to    claim 17   , wherein the periphery on the side end of said semiconductor layer is surrounded by said local oxide film or said insulating film.  
     
     
         19 . The method of manufacturing a semiconductor device according to    claim 17   , wherein, after forming an element region composed of said semiconductor layer, source/drain regions of an insulated gate field effect transistor are formed in said semiconductor layer with said impurity region being put therebetween.

Join the waitlist — get patent alerts

Track US2001019155A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.