Sparse-carrier devices and method of fabrication
Abstract
A sparse-carrier device including a crystal structure ( 10 ) formed of a first material and having a crystallographic facet ( 26 ) with a width (w) and a length and quantum dots ( 30 ) formed of a second material and positioned in at least one row on the crystallographic facet ( 26 ). The at least one row of quantum dots ( 30 ) extends along the length of the crystallographic facet ( 26 ) and is at least one quantum dot ( 30 ) wide (w) and a plurality of quantum dots long. The number of quantum dot rows determined by the width (w) of the crystallographic facet ( 26 ). The row of quantum dots ( 30 ) form a building block for circuits based on sparse or single electron devices.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A sparse-carrier device comprising:
a supporting layer having a surface; a crystallographic facet of a first material epitaxially grown on the surface of the supporting layer, the crystallographic facet having a surface with a width and a length substantially parallel with the supporting layer; and quantum dots formed of a second material and positioned substantially in at least one row on the surface only of the crystallographic facet, the row extending along the length of the crystallographic facet and being at least one quantum dot wide and a plurality of quantum dots long, the number of rows of quantum dots determined by the width of the crystallographic facet.
2 . A sparse-carrier device as claimed in claim 1 wherein the width of the crystallographic facet is defined to restrict formation of the second material thereon to a one quantum dot wide row of quantum dots.
3 . A sparse-carrier device as claimed in claim 2 wherein the width of the crystallographic facet is less than approximately 200 nm.
4 . A sparse-carrier device as claimed in claim 3 wherein the width of the crystallographic facet is less than approximately 200 nm.
5 . A sparse-carrier device as claimed in claim 1 wherein the first material includes gallium arsenide.
6 . A sparse-carrier device as claimed in claim 5 wherein the second material includes indium arsenide.
7 . A sparse-carrier device as claimed in claim 6 wherein the crystallographic facet of the first material is a (100) facet.
8 . A sparse-carrier device as claimed in claim 1 wherein the quantum dots have a diameter of approximately 25 nm.
9 . A sparse-carrier device as claimed in claim 1 including in addition a portion of the supporting layer covered by a deep ultraviolet oxide film positioned to define the size and shape of the crystallographic facet.
10 . A sparse-carrier device comprising:
a supporting layer having a surface; a crystallographic facet including gallium arsenide selectively grown on the surface of the supporting layer, the crystallographic facet having an upper surface with a width and a length substantially parallel with the supporting layer; indium based quantum dots formed in at least one row on the upper surface of the crystallographic facet, the row extending along the length of the crystallographic facet and being at least one quantum dot wide and a plurality of quantum dots long, the number of rows of quantum dots determined by the width of the crystallographic facet; the crystallographic facet being selected so that the quantum dots selectively form only on the upper surface of the crystallographic facet; and the crystallographic facet being defined with a width to restrict formation of the indium based quantum dots thereon to the at least one quantum dot wide row of quantum dots.
11 . A sparse-carrier device as claimed in claim 10 wherein the width of the crystallographic facet is less than approximately 1.5 μm.
12 . A sparse-carrier device as claimed in claim 11 wherein the width of the crystallographic facet is less than approximately 200 nm.
13 . A sparse-carrier device as claimed in claim 10 wherein the crystallographic facet is a (100) facet.
14 . A sparse-carrier device as claimed in claim 10 wherein the quantum dots have a diameter of approximately 25 nm.
15 . A sparse-carrier device as claimed in claim 10 including in addition a portion of the surface of the supporting layer covered by a deep ultraviolet oxide film positioned to define the size and shape of the crystallographic facet.
16 . A method of fabricating a sparse-carrier device comprising the steps of:
providing a crystal substrate of a first material; forming a crystal structure on the crystal substrate, the crystal structure being formed by epitaxially growing a crystallographic facet of the first material with a width and a length; and selectively growing quantum dots of a second material in at least one row on the crystallographic facet, the at least one row extending along the length of the crystallographic facet and being at least one quantum dot wide and a plurality of quantum dots long, the number of rows of quantum dots determined by the width of the crystallographic facet.
17 . A method of fabricating a sparse-carrier device as claimed in claim 16 wherein the step of selectively growing quantum dots includes covering portions of the crystal substrate, other than the crystal structure, with an oxide.
18 . A method of fabricating a sparse-carrier device as claimed in claim 16 wherein the step of growing the crystallographic facet includes restricting the width of the crystallographic facet to a width that restricts formation of the second material thereon to the one quantum dot wide row of quantum dots.
19 . A method of fabricating a sparse-carrier device as claimed in claim 18 wherein the step of restricting the width of the crystallographic facet includes restricting the width to less than approximately 1.5 μm.
20 . A method of fabricating a sparse-carrier device as claimed in claim 19 wherein the step of restricting the width of the crystallographic facet includes restricting the width to less than approximately 200 nm.
21 . A method of fabricating a sparse-carrier device as claimed in claim 16 wherein the step of growing the crystallographic facet includes growing a (100) facet.Join the waitlist — get patent alerts
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