Process of manufacturing a dynamic random access memory device

Abstract

A dynamic random access memory device formed in a substrate having a trench. The trench has a side wall, a top, a lower portion, and a circumference. The device includes a signal storage node including a storage node conductor formed in the lower portion of the trench and isolated from the side wall by a node dielectric and a collar oxide above the node dielectric. A buried strap is coupled to the storage node conductor and contacts a portion of the side wall of the trench above the collar oxide. A trench-top dielectric which is formed upon the buried strap has a trench-top dielectric thickness. A signal transfer device includes a first diffusion region extending into the substrate adjacent the portion of the trench side wall contacted by the buried strap, a gate insulator having a gate insulator thickness formed on the trench side wall above the first buried strap, wherein the gate insulator thickness is less than the trench-top dielectric thickness, and a gate conductor formed within the trench upon the trench-top dielectric and adjacent the gate insulator.

What is claimed:  
     
         1 . A dynamic random access memory device comprising: 
 a substrate having a trench formed therein, the trench having a lower portion and a side wall;    a signal storage node including a storage node conductor formed in the lower portion of the trench, a node dielectric, and a collar oxide disposed above the node dielectric, the storage node conductor isolated from the side wall by the node dielectric and by the collar oxide;    a buried strap coupled to the storage node conductor and contacting a portion of the side wall of the trench above the collar oxide;    a trench-top dielectric having a trench-top dielectric thickness formed upon the buried strap; and    a signal transfer device including: 
 a first diffusion region extending into the substrate adjacent the portion of the trench side wall contacted by the buried strap,  
 a gate insulator having a gate insulator thickness formed on the trench side wall above the buried strap, wherein the gate insulator thickness is less than the trench-top dielectric thickness, and  
 a gate conductor formed within the trench upon the trench-top dielectric and adjacent the gate insulator.  
   
     
     
         2 . A dynamic random access memory device according to    claim 1    wherein a ratio of the trench-top dielectric thickness to the gate insulator thickness ranges between 3:1 and 12:1.  
     
     
         3 . A dynamic random access memory device according to    claim 1    wherein the trench-top dielectric thickness ranges between 20 nm and 100 nm.  
     
     
         4 . A dynamic random access memory device according to    claim 1    wherein the trench has a circumference and the buried strap contacts the side wall of the trench along a fragment of the trench circumference.  
     
     
         5 . A dynamic random access memory device according to    claim 4    wherein the trench has a top and the device further comprises a trench insulator formed in the trench extending from the top of the trench down through a portion of the collar oxide and extending around the circumference of the trench exclusive of the fragment of the trench contacted by the buried strap.  
     
     
         6 . A dynamic random access memory device according to    claim 1    wherein the device has a signal storage node leakage current less than 10 −  amperes.  
     
     
         7 . A dynamic random access memory device according to    claim 5    wherein a ratio of the trench-top dielectric thickness to the gate insulator thickness ranges between 3:1 and 12:1.  
     
     
         8 . A process of manufacturing a dynamic random access memory device in a substrate comprising the steps of: 
 (a) etching a trench in the substrate, the trench having a side wall, a lower portion, and an upper portion;    (b) forming a signal storage node having a storage node conductor disposed in the lower portion of the trench;    (c) depositing a trench-top dielectric having a trench-top dielectric thickness upon the storage node conductor;    (d) forming a signal transfer device having a gate conductor in the trench above the trench-top dielectric isolated from the side wall by a gate insulator having a gate insulator thickness less than the trench-top dielectric thickness.    
     
     
         9 . A process of manufacturing a dynamic random access memory device in a substrate comprising the steps of: 
 (a) forming a trench in the substrate, the trench having a side wall and a lower portion;    (b) forming a signal storage node having a storage node conductor in the lower portion of the trench isolated from the side wall by a node dielectric and by a collar oxide disposed above the node dielectric;    (c) coupling the storage node conductor, with a buried strap, to a portion of the side wall above the collar oxide;    (d) depositing a trench-top dielectric having a trench-top dielectric thickness upon the storage node conductor;    (e) forming a signal transfer device including: 
 (i) a first diffusion region extending into the substrate adjacent the portion of the trench side wall contacted by the buried strap,  
 (ii) a gate insulator having a gate insulator thickness formed on the trench side wall above the buried strap, wherein the gate insulator thickness is less than the trench-top dielectric thickness, and  
 (iii) a gate conductor formed within the trench upon the trench-top dielectric and adjacent the gate insulator.  
   
     
     
         10 . The process according to    claim 9    wherein step (d) includes using one of high density plasma (HDP) deposition and flowable oxide (FOX) deposition.  
     
     
         11 . The process according to    claim 9    wherein steps (d) and (e) include forming the trench-top dielectric and the gate insulator wherein the trench-top dielectric has a thickness ranging between three and twelve times the gate insulator thickness.  
     
     
         12 . The process according to    claim 9    wherein step (d) includes forming the trench-top dielectric having a thickness ranging between 20 and 100 nm.  
     
     
         13 . The process according to    claim 9    wherein the trench has a circumference and in step (e) the buried strap is formed to contact the side wall of the trench along a fragment of the trench circumference.  
     
     
         14 . The process according to    claim 13    wherein the trench has a top and the process further comprises a step of depositing a trench insulator in the trench extending from the top of the trench down through a portion of the collar oxide and extending around the circumference of the trench exclusive of the fragment of the trench contacted by the buried strap.  
     
     
         15 . The process according to    claim 9    wherein step (d) includes depositing the trench-top dielectric to a thickness wherein the signal storage node has a leakage current less than  10   −  amperes.  
     
     
         16 . The process according to    claim 14    wherein steps (d) and (e) include forming the trench-top dielectric and the gate insulator wherein the trench-top dielectric has a thickness ranging between three and twelve times the gate insulator thickness.  
     
     
         17 . A process of manufacturing a dynamic random access memory device in a substrate comprising the steps of: 
 (a) forming a trench in the substrate, the trench having a side wall, a lower portion, and a circumference;    (b) forming a signal storage node having a storage node conductor in the lower portion of the trench, the storage node conductor being isolated from the side wall by a node dielectric and by a collar oxide disposed above the node dielectric and being coupled to a portion of the side wall by a buried strap extending above the collar oxide and around a fragment of the circumference of the trench;    (c) forming an isolation region within the trench extending into the collar oxide and around the circumference of the trench exclusive of the fragment contacted by the buried strap; and    (d) forming a signal transfer device having a gate conductor in the trench.    
     
     
         18 . A process of manufacturing a dynamic random access memory device according to    claim 17    wherein step (c) includes the steps of: 
 (c1) filling the trench with a photoresist;  
 (c2) etching the photoresist from the trench along the circumference of the trench exclusive of the fragment contacted by the buried strap; and  
 (c3) performing a shallow trench isolation etch into a portion of the collar oxide along the circumference of the trench exclusive of the fragment contacted by the buried strap.  
 
     
     
         19 . The process according to    claim 17    further comprising the step of forming a trench-top dielectric between the storage node conductor and the gate conductor.  
     
     
         20 . The process according to    claim 19    wherein the trench-top dielectric is formed having a thickness ranging between 20 nm and 100 nm.