US2001017294A1PendingUtilityA1

Method and equipment for manufacturing semiconductor device

Priority: Nov 14, 1997Filed: Feb 14, 2001Published: Aug 30, 2001
Est. expiryNov 14, 2017(expired)· nominal 20-yr term from priority
H10D 64/01346H10P 72/0436H10P 14/6512H10P 14/6322H10P 14/6309H10D 64/01336H10D 64/0134H10D 84/0181H10D 84/038
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Claims

Abstract

A silicon wafer is heated from an initial pre-heating temperature (T 0 ) up to a first annealing temperature (T 1 ) by a rapid heating up step using an IR lamp. A first annealing is executed at the first annealing temperature (T 1 ). Successively, while the silicon wafer is maintained at a second annealing temperature (T 2 ) lower than the first annealing temperature (T 1 ), a second annealing step is executed by a resistive heating furnace. A thermal oxidation can be executed as the second annealing step. To do so, an equipment for manufacturing a semiconductor device in the present invention is provided with: a heating device having an IR lamp and a resistive heater; an annealing tube having on a surface thereof a plurality of concave portions in such a way that each bottom approaches a central line; a resistive heater wrapped around this annealing tube; and an IR lamp movably inserted into and pulled out from the concave portion from the external. A IR lamp moving unit for moving the IR lamp is connected to the IR lamp. A wafer loader for mounting a plurality of wafers can be carried into and from the annealing tube. The first annealing step using the IR lamp at the rapid heating rate and successively the second annealing step using the resistive heater are performed on the plurality of wafers without performing a cooling step down to the room temperature. Accordingly, it is possible to effectively recover the damage induced by ion implantation and the like and also possible to suppress the enhanced diffusion of impurity resulting from the damage to thereby improve the controllability of impurity distribution profile.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A method for manufacturing a semiconductor device comprising the steps of: 
 (a) heating a semiconductor substrate from a initial temperature up to a first annealing temperature at a first heating rate, and then maintaining this temperature for a predetermined period, and thereby performing a first annealing on said semiconductor substrate;    (b) decreasing temperature of said semiconductor substrate from said first annealing temperature to a second annealing temperature, which is higher than said initial temperature and lower than said first annealing temperature, at a first cooling rate;    (c) maintaining said second annealing temperature for a predetermined period and thereby performing a second annealing on said semiconductor substrate; and    (d) cooling said semiconductor substrate at a second cooling rate.    
     
     
         2 . The method of    claim 1   , wherein said first cooling rate is lower than said first heating rate.  
     
     
         3 . The method of    claim 1   , wherein said second cooling rate is lower than said first heating rate.  
     
     
         4 . The method of    claim 2   , wherein said second cooling rate is lower than said first cooling rate.  
     
     
         5 . The method of    claim 1   , wherein said initial temperature is equal to or higher than 500° C. and equal to or lower than 600° C.  
     
     
         6 . The method of    claim 1   , wherein said first heating rate is equal to or higher than 10° C. per second.  
     
     
         7 . The method of    claim 1   , wherein said first annealing temperature is equal to or higher than 950° C.  
     
     
         8 . The method of    claim 1   , wherein said second annealing temperature is equal to or higher than 600° C. and equal to or lower than 950° C.  
     
     
         9 . The method of    claim 1   , wherein said second cooling rate is equal to or lower than 500° C. per minute.  
     
     
         10 . The method of    claim 1   , wherein the step of performing the annealing at said first annealing temperature is executed by an IR lamp and the step of performing the annealing on said semiconductor substrate at said second annealing temperature is executed by a resistive heater.  
     
     
         11 . The method of    claim 10   , wherein said first annealing step is executed in ambient containing inert gas and said second annealing step is executed in oxidative ambient.  
     
     
         12 . The method of    claim 10   , wherein said first annealing step is executed in ambient containing hydrogen gas and said second annealing step is executed in the oxidative ambient.  
     
     
         13 . The method of    claim 10   , wherein said first annealing step is executed in ambient containing reduction gas and said second annealing step is executed in the oxidative ambient.  
     
     
         14 . The method of    claim 10   , wherein said second annealing step is executed in oxidative ambient containing water vapor.  
     
     
         15 . A method of manufacturing a semiconductor device comprising the steps of: 
 (a) heating a semiconductor substrate from a initial temperature up to a first annealing temperature at a first heating rate, and then maintaining this temperature for a predetermined period, and thereby performing a first annealing on said semiconductor substrate;    (b) decreasing temperature of said semiconductor substrate from said first annealing temperature to a second annealing temperature, which is higher than said initial temperature and lower than said first annealing temperature, at a first cooling rate;    (c) maintaining said second annealing temperature for a predetermined period and thereby performing a second annealing on said semiconductor substrate;    (d) heating said semiconductor substrate up to a third annealing temperature higher than said second annealing temperature at a second heating rate, and then maintaining this temperature for a predetermined period, and thereby performing a third annealing on said semiconductor substrate; and    (e) cooling said semiconductor substrate at a second cooling rate down to said initial temperature.    
     
     
         16 . The method of    claim 15   , wherein said first cooling rate is lower than said first heating rate.  
     
     
         17 . The method of    claim 15   , wherein a second heating rate is higher than said first cooling rate.  
     
     
         18 . The method of    claim 15   , wherein said second cooling rate is lower than said first cooling rate.  
     
     
         19 . The method of    claim 15   , wherein the step of performing said first annealing is executed by an IR lamp and the step of performing said second annealing is executed by a resistive heater.  
     
     
         20 . The method of    claim 19   , wherein the step of performing said third annealing is executed by an IR lamp.  
     
     
         21 . The method of    claim 15   , wherein said third annealing temperature is higher than said second annealing temperature.  
     
     
         22 . An equipment for manufacturing a semiconductor device comprising: 
 (a) an annealing tube for transmitting a light having a predetermined wavelength;    (b) a resistive heater positioned adjacently to the annealing tube;    (c) an IR lamp positioned adjacently to and movable to said annealing tube; and    (d) an IR lamp moving unit for moving the IR lamp.    
     
     
         23 . The equipment of    claim 22   , wherein a plurality of concave portions are formed at a wall of said annealing tube, and said IR lamp is movably inserted into and pulled out from the concave portion.  
     
     
         24 . The equipment of    claim 23   , wherein said resistive heater is adapted so as to be wrapped around said annealing tube at least a few turns in a form of a coil, and said concave portions are disposed at the wall of said annealing tube arranged between the turns of the coil.  
     
     
         25 . The equipment of    claim 22   , further comprising a wafer loader which can carry a plurality of semiconductor substrates and is carried into and from said annealing tube.

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