Semiconductor - oxide - semiconductor capacitor formed in intergtated circuit

Abstract

An integrated capacitor structure includes first and second, conductive semiconductor portions spaced apart from one another where the first and second semiconductor portions are both of a same conductivity type (both N or both P). The integrated capacitor structure may be formed using same processes as are used for fabricating gate insulator and gate electrode parts of neighboring MOS transistors in a same integrated circuit.

What is claimed is:  
     
         1 . A capacitor structure [ 108 ] comprising: 
 (a) a first conductive semiconductor element [ 105 ] having a respective first conductivity type [N];    (b) a spaced apart second conductive semiconductor element [ 131 ] of the same first conductivity type [N]; and    (c) an insulator [ 120 ] disposed between said first and second semiconductor elements.    
     
     
         2 . A capacitor structure according to    claim 1    wherein: 
 (a.1) said first conductive semiconductor element [ 105 ] is defined in a bulk substrate portion [ 110 ] of an integrated circuit device [ 100 ].  
 
     
     
         3 . A capacitor structure according to    claim 2    wherein said integrated circuit device includes one or more MOS transistors [ 118 ] each having a gate insulator of a first thickness and wherein: 
 (c.1) said insulator [ 120 ] disposed between said first and second semiconductor elements has essentially a same thickness as the first thickness of the gate insulator of the one or more MOS transistors.  
 
     
     
         4 . A capacitor structure according to    claim 3    wherein said one or more MOS transistors [ 118 ] each has a gate electrode [ 132 ] of a second thickness and wherein: 
 (b.1) said second conductive semiconductor element [ 131 ] has essentially a same thickness as the second thickness.  
 
     
     
         5 . A method for forming a capacitor structure [ 108 ] in an integrated circuit, said method comprising the steps of: 
 (a) defining a first conductive semiconductor element [ 105 ] having a respective first conductivity type [N];    (b) defining a spaced apart second conductive semiconductor element [ 131 ] of the same first conductivity type [N]; and    (c) providing an insulator [ 120 ] for disposition between said first and second semiconductor elements.    
     
     
         6 . A method according to    claim 5    for forming a capacitor structure [ 108 ], wherein said integrated circuit device includes one or more MOS transistors [ 118 ] each having a gate insulator and wherein: 
 (c.1) said step of providing the insulator [ 120 ] for disposition between said first and second semiconductor elements simultaneously provides the respective gate insulators of the one or more MOS transistors.  
 
     
     
         7 . A method according to    claim 6    for forming a capacitor structure [ 108 ], wherein said one or more MOS transistors [ 118 ] each has a gate electrode [ 132 ] and wherein: 
 (b.1) said step of defining the second conductive semiconductor element [ 131 ] simultaneously defines the respective gate electrodes of the one or more MOS transistors.  
 
     
     
         8 . A method for forming a capacitor structure [ 808 ] in a CMOS integrated circuit that is to also have a PMOS transistor [ 818 ] and a NMOS transistor [ 118 ]; where the PMOS transistor is to be formed in a N-type well [ 815 ] and with a P-type gate [ 832 ]; where the NMOS transistor is to be formed with a N-type, source/drain implant [ 114 / 116 ] and with a N-type gate [ 132 ]; and where a gate insulator layer [ 820 ] is to be simultaneously formed for the PMOS and NMOS transistors, said method comprising the steps of: 
 (a) at the same time that said N-type well [ 815 ] of the PMOS transistor is defined, also defining a N-type well [ 805 ] for serving as a first conductive semiconductor element of the to-be-formed capacitor structure;    (b) at the same time that said N-type source/drain implant [ 114 / 116 ] for the NMOS transistor is carried out, also implanting N-type contact regions [ 807   a - c ] in said first conductive semiconductor element of the to-be-formed capacitor structure;    (c) forming an insulator [ 820 ] atop said first semiconductor element and atop the N-type well [ 815 ] of the PMOS transistor;    (d) at the same time that material for said gates [ 132 , 832 ] of the NMOS and PMOS transistors is deposited, also depositing material for a second semiconductor element of the to-be-formed capacitor structure; and    (e) at the same time that the gate material of the NMOS transistor is doped to be N-type, also doping the material of the second semiconductor element to be N-type.