Contact in semiconductor memory device and method of forming the same

Abstract

A contact in a semiconductor memory device is formed on an active region of a cell array region, rather than on a sloped area between the cell array region and a core region. Preferably, an insulating layer on the active region is etched to form a hole therein and the contact formed through the hole. Preferably, the etching is performed using an etch solution having a high etch selectivity between the insulating layer and a top layer of the active region. Thus, the contact is evenly formed and the area of the cell array region is reduced, thereby enabling cells to be packed on a chip with high density.

What is claimed is:  
     
         1 . A semiconductor memory device having a cell array region divided into an active region and a field region, and a peripheral region, comprising: 
 an access transistor;    a capacitor stacked with a storage electrode connected to the active region for the access transistor, a dielectric layer of a high dielectric constant, and a plate electrode in order; and    a plate electrode contact formed over the active region of the cell array region.    
     
     
         2 . The semiconductor memory device of    claim 1   , further comprising an insulating layer formed on the capacitor and a contact hole in the insulating layer, the plate electrode contact being formed through the contact hole.  
     
     
         3 . The semiconductor memory device of    claim 1   , wherein the plate electrode contact is formed over the storage electrode.  
     
     
         4 . A semiconductor memory device comprising: 
 a first area including a memory cell;    a second area free of a memory cell, adjacent to the first area; and    a plate electrode contact formed in the first area.    
     
     
         5 . The semiconductor memory device of    claim 4   , wherein the first area is a cell array region and the second area is a core region.  
     
     
         6 . The semiconductor memory device of    claim 4   , further comprising an insulating layer formed on the first area and a contact hole in the insulating layer, the plate electrode contact being formed through the contact hole.  
     
     
         7 . The semiconductor memory device of    claim 4   , further comprising a storage electrode in the first area and wherein the plate electrode contact is formed over the storage electrode.  
     
     
         8 . A method of forming a contact for a plate electrode in a semiconductor memory device having a capacitor stacked with a storage electrode, a dielectric layer of a high dielectric constant, and a plate electrode in order, and an insulating layer formed on the plate electrode, the method comprising: 
 forming a contact hole through said insulating layer on the active region of a cell array region;    filling the contact hole with an electrode forming material; and    patterning the electrode forming material.    
     
     
         9 . The method of    claim 8   , wherein the forming a contact hole includes positioning the contact hole over the storage electrode on the active region of the cell array region.  
     
     
         10 . The method of    claim 8   , wherein the forming a contact hole includes etching the insulating layer using an etching solution having a high etch selectivity between the insulating layer and the plate electrode.  
     
     
         11 . The method of    claim 10   , wherein the etching includes using one of CO and CH 4  as the etching solution.