Semiconductor device, nonvolatile semiconductor storage apparatus using the device, and manufacuture method of the device

Abstract

A semiconductor device which is operable with a small occupied area, high reliability, and low power consumption, a nonvolatile semiconductor storage apparatus using the device and a manufacture method of the device. A semiconductor device of the present invention comprises a first gate insulating film, floating gate, second gate insulating film, and control gate on a semiconductor substrate, and a source area and a drain area formed in the semiconductor substrate on opposite sides of the floating gate, the floating gate comprises a first floating gate and a second floating gate disposed to cover the first floating gate, and an isolating gate is formed on the second floating gate on the side of the semiconductor substrate, and parallel to the first floating gate via an isolating insulating film.

What is claimed is:  
     
         1 . A semiconductor device comprising: 
 a first gate insulating film on a semiconductor substrate,    an isolating gate electrode on said first gate insulating film,    an isolating insulating film on the top surface of said isolating gate electrode and a side surface of said isolating gate electrode,    a floating gate on said isolating insulating film,    a second gate insulating film on said floating gate; and    a control gate on said second gate insulating film;    wherein said floating gate comprises a first floating gate portion which is on said first gate insulating film and is adjacent to said isolating gate electrode through a part of said isolating insulating film on said side surface of said isolating gate electrode and a second floating gate portion which is on said first floating gate portion and on a part of said isolating insulating film on said top surface of said isolating gate electrode.    
     
     
         2 . The semiconductor device as claimed in    claim 1    wherein said isolating insulating film on said side surface of said isolating gate electrode is thicker than said first gate insulating film.  
     
     
         3 . The semiconductor device as claimed in    claim 1    further comprising; 
 a source region and a drain region in said semiconductor substrate on opposite sides of said floating gate.  
 
     
     
         4 . A nonvolatile semiconductor memory device comprising: 
 a plurality of buried bit lines arranged in a semiconductor substrate,    a plurality of word lines on said semiconductor substrate arranged to intersect the buried bit lines; and    a plurality of said semiconductor devices which arcis disposed at respective intersections of said buried bit lines and said word lines, each of said semiconductor devices includes: 
 a first gate insulating film on a semiconductor substrate,  
 an isolating gate electrode on said first gate insulating film,  
 an isolating insulating film on the top surface of said isolating gate electrode and a side surface of said isolating gate electrode,  
 a floating gate on said isolating insulating film,  
 a second gate insulating film on said floating gate,  
 a control gate on said second gate insulating film; and  
 a source region and a drain region in said semiconductor substrate on opposite sides of said floating gate;  
 wherein said floating gate comprises a first floating gate portion which is on said first gate insulating film and is adjacent to said isolating gate electrode through a part of said isolating insulating film on said side surface of said isolating gate electrode and a second floating gate portion which is on said first floating gate portion and on a part of said isolating insulating film on said top surface of said isolating gate electrode.  
   
     
     
         5 . The nonvolatile semiconductor memory device as claimed in    claim 4    wherein said plurality of buried bit lines includes said drain regions and said plurality of word lines include said control gate.  
     
     
         6 . The nonvolatile semiconductor memory device as claimed in    claim 5    further comprising; 
 a X decoder which selects one of said word lines,  
 a Y decoder which selects one of said buried bit lines; and  
 a sub Y decoder which selects one of said isolating gates.  
 
     
     
         7 . The nonvolatile semiconductor memory device as claimed in    claim 6    wherein said X decoder includes means for supplying a first individual voltage to one of said word lines which a selected semiconductor device belongs to, said Y decoder includes means for supplying a second individual voltage to one of said buried bit lines which is adjacent to said selected semiconductor device, said sub Y decoder includes means for selecting none of said isolating gates at a writing time.  
     
     
         8 . The nonvolatile semiconductor memory device as claimed in    claim 6    wherein said X decoder includes means for supplying a first individual voltage to one of said word lines which a selected semiconductor device belongs to, said Y decoder includes means for supplying a second individual voltage to none of said buried bit lines, said sub Y decoder includes means for selecting none of said isolating gates at a erasing time.  
     
     
         9 . The nonvolatile semiconductor memory device as claimed in    claim 6    wherein said X decoder includes means for supplying a first individual voltage to one of said word lines which a semiconductor device to read belongs to, said Y decoder includes means for supplying a second individual voltage to one of said buried bit lines which said semiconductor device to read belongs to and includes means for supplying a third individual voltage to one of said buried bit lines which is adjacent to said semiconductor device to read, said sub Y decoder includes means for selecting one of said isolating gates which belongs to said semiconductor device to read.  
     
     
         10 . A manufacture method of a semiconductor device comprising: 
 forming an first gate insulating film on a semiconductor substrate,    forming an isolating gate electrode on said first gate insulating film,    forming an isolating insulating film on the top surface of said isolating gate electrode and a side surface of said isolating gate electrode,    forming a floating gate on said isolating insulating film,    forming a second gate insulating film on said floating gate; and    forming a control gate on said second gate insulating film; wherein said floating gate comprises a first floating gate portion which is on said first gate insulating film and is adjacent to said isolating gate electrode through a part of said isolating insulating film on said side surface of said isolating gate electrode and a second floating gate portion which is on said first floating gate and on a part of said isolating insulating film on said top surface of said isolating gate electrode.    
     
     
         11 . The manufacture method of the semiconductor device as claimed in    claim 10    further comprising after forming an isolating insulating film: 
 forming a side wall of said isolating gate electrode and said isolating insulating film as a first floating gate portion; and  
 forming a second floating gate portion on said isolating insulating film and said side wall.  
 
     
     
         12 . The manufacture method of the semiconductor device as claimed in    claim 11   , wherein said isolating insulating film on said side surface of said isolating gate electrode is thicker than said first gate insulating film.  
     
     
         13 . The manufacture method of the semiconductor device as claimed in    claim 11    further comprising: 
 removing one of said side wall corresponding to one of said isolating gate electrode to remain the other of said side wall.  
 
     
     
         14 . The manufacture method of the semiconductor device as claimed in    claim 11    further comprising after forming a side wall: 
 forming an interlayer insulating film On said isolating insulating film and said side wall; and  
 conducting CMP to said interlayer insulating film to remove said interlayer insulating film on said side wall.