Metal and metal silicide nitridization in a high density, low pressure plasma reactor

Abstract

A nitridization process to form a barrier layer on a substrate is described. The nitridization process includes depositing a layer of metal or metal silicide on a surface of the substrate, placing the substrate into a high density, low pressure plasma reactor, introducing into the high density, low pressure plasma reactor a gas including nitrogen, and striking a plasma in the high density, low pressure plasma reactor under conditions that promote nitridization of at least a portion of the layer of metal or metal silicide to produce a composition of metal nitride or metal silicon nitride, respectively.

What is claimed is:  
     
         1 . A process for nitridization to form a barrier layer on a substrate, comprising: 
 depositing a layer of metal or metal silicide on a surface of said substrate;    placing said substrate into a high density, low pressure plasma reactor;    introducing into said high density, low pressure plasma reactor a gas including nitrogen; and    striking a plasma in said high density, low pressure plasma reactor under conditions that promote nitridization of at least a portion of said layer of metal or metal silicide to produce a composition of metal nitride or metal silicon nitride, respectively.    
     
     
         2 . The process of    claim 1   , wherein the high density, low pressure plasma reactor is an inductive plasma reactor.  
     
     
         3 . The process of    claim 1   , wherein said depositing said layer of metal comprises depositing said layer of metal such that an opening in a dielectric layer of said substrate is at least partially filled.  
     
     
         4 . The process of    claim 3   , wherein said striking a plasma comprises producing said composition of metal nitride or metal silicon nitride that is substantially uniform along a depth of said opening in said dielectric layer of said substrate.  
     
     
         5 . The process of    claim 4   , wherein said striking comprises forming said composition of metal nitride or metal silicon nitride on a top portion of said layer of metal or metal silicide such that said composition of metal nitride or metal silicon nitride is thick enough to effectively prevent diffusion of conductive particles from a conductive material disposed above said layer of metal or metal silicide into said dielectric layer.  
     
     
         6 . The process of    claim 5   , wherein said striking comprises forming said composition of metal nitride or metal silicon nitride on a top portion of said layer of metal or metal silicide, said top portion is about 200 Angstroms thick.  
     
     
         7 . The process of    claim 1   , wherein said opening is a contact hole or a via having an aspect ratio of at least about 4:1.  
     
     
         8 . The process of    claim 1   , wherein said depositing said layer of metal or metal silicide comprises sputter depositing a metal or metal silicide layer on said surface of said partially fabricated integrated circuit.  
     
     
         9 . The process of    claim 1   , wherein said depositing said metal comprises depositing said layer of metal or metal silicide by chemical vapor deposition and maintaining said substrate at a temperature of no more than about 300° C.  
     
     
         10 . The process of    claim 1   , wherein nitrogen and argon are introduced into said high density, low pressure plasma reactor at a flow ratio of between about 2:1 and about 10:1.  
     
     
         11 . The process of    claim 1   , wherein said depositing said layer of metal comprises depositing at least one of titanium, tungsten, tantalum, molybdenum, chromium, niobium, zirconium.  
     
     
         12 . The process of    claim 1   , wherein said depositing said layer of metal silicide includes at least one of titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, chromium silicide, niobium silicide, zirconium silicide.  
     
     
         13 . The process of    claim 1   , wherein said striking comprises producing a composition of metal nitride that includes at least one of titanium nitride, tungsten nitride, tantalum nitride, molybdenum nitride, chromium nitride, niobium nitride, zirconium nitride.  
     
     
         14 . The process of    claim 1   , wherein said striking comprises producing a composition of metal silicon nitride that includes at least one of titanium silicon nitride, tungsten silicon nitride, tantalum silicon nitride, molybdenum silicon nitride, chromium silicon nitride, niobium silicon nitride, zirconium silicon nitride.  
     
     
         15 . The process of    claim 1   , further comprising a step of maintaining the partially fabricated integrated circuit at a temperature of between about 20 and about 300□C.  
     
     
         16 . The process of    claim 1   , wherein the step of introducing a gas into the transformer coupled plasma reactor provides a gas pressure in the reactor of between about 1 and about 100 milliTorr.  
     
     
         17 . The process of    claim 1   , wherein said step of striking a plasma involves supplying radio frequency power to a transformer coupled plasma reactor coil electrode at a power of between about 200 and 3000 Watts.  
     
     
         18 . The process of    claim 1   , further comprising a step of applying bias to an electrode located below said substrate and said electrode located below said substrate is provided with a power of between about 0 and about 1000 Watts.  
     
     
         19 . The process of    claim 1   , wherein said introducing comprises introducing said gas at a flow rate that is between about 10 and about 1000 standard cubic centimeters per minute.  
     
     
         20 . The process of    claim 1   , further comprising a step of depositing at least one of tungsten, aluminum and copper on said partially fabricated integrated circuit and substantially filling the opening in the dielectric layer after said step of striking a plasma is performed.  
     
     
         21 . The process of    claim 1   , wherein metal nitridization is formed on a top portion of a layer of metal, said top portion is about 200 Angstroms.  
     
     
         22 . A partially fabricated integrated circuit, comprising 
 a substrate;    a dielectric layer disposed above said substrate;    a contact hole or via having an aspect ratio of at least about 4:1 formed inside said dielectric layer to provide an opening to said substrate; and    a barrier layer including metal nitride or metal silicon nitride formed inside said contact hole or via to effectively prevent diffusion of particles into said dielectric layer, said barrier layer having a substantially uniform composition throughout a depth of said contact hole or via such that a stoichiometric ratio of metal to nitrogen or metal silicide to nitrogen present in said metal nitride or metal silicon nitride barrier layer, respectively, is substantially constant.    
     
     
         23 . The partially fabricated integrated circuit of    claim 22   , wherein said metal nitride includes at least one of titanium nitride, tungsten nitride, tantalum nitride, molybdenum nitride, chromium nitride, niobium nitride, zirconium nitride.  
     
     
         24 . The partially fabricated integrated circuit of    claim 22   , wherein said metal silicon nitride includes at least one of titanium silicon nitride, tungsten silicon nitride, tantalum silicon nitride, molybdenum silicon nitride, chromium silicon nitride, niobium silicon nitride, zirconium silicon nitride.  
     
     
         25 . The partially fabricated integrated circuit of    claim 22   , further comprising a layer of metal or metal silicide disposed below said barrier layer including metal nitride or metal silicon nitride, respectively.